Analog IC Design Engineer

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Central Engineering - AMS IP is responsible for delivery world class IPs storage, network and accelerated computing projects.

What You Can Expect

Seeking a Director of Analog IC to be part of a Marvell's central engineering team designing highly sophisticated CMOS transceiver IPs and other critical IPs. Responsibilities would span working with team on architectural investigations and implementation for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs etc. to meet key performance targets and performing design verification using industry standard tools such as SPICE, Spectre, MATLAB etc.

In this role, successful candidate will lead a team of analog design engineers, interface with layout, verification, and application teams and manage delivery of analog IP to successfully bring designs from concept to production.

What We're Looking For

Master’s degree and/or PhD Preferred in Electrical Engineering or related fields with 10+ years of experience. A successful candidate should have experience in some of the following designs:

• PLL, Data Converters, Oscillators and high-speed SerDes design including Receiver and Transmitter design.
• Experience in Single-ended High Density Parallel Interface for Chip to Chip Communication, DDR5/LPDDR5; GDDR6/LPDDR6 a plus
• Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post layout extraction tools) is a must
• Knowledge of the fundamentals on signal integrity improvement, noise reduction and Multi-GHz low-jitter clock generation & distribution.
• Good understanding of analog layouts in FinFet and its effect on high-speed designs
• Experienced in system level pre-tape out analog validation
• Experienced in lab chip bring-up and debugging efforts
• Strong leader and communicator.
• Have a history of leading successful teams and worked on a complex project which requires a large number of engineers.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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