Electrical Engineering Internship @ CesiumAstro

INACTIVE

Internship

Electrical Engineering Internship

Posted on 3/19/2024

CesiumAstro

51-200 employees

Develops communication payloads for air and space

Hardware

Aerospace

Milton Keynes, UK

Required Skills

Verilog

VHDL

FPGA

Requirements

Current enrolment in a Bachelor of Science (BSc), Master of Science (MSc), or PhD program in Electrical Engineering or Computer Engineering from an accredited university.
Good knowledge of Python.
Good knowledge of VHDL/Verilog.
Advanced coursework in design, analysis, and implementation of FPGA systems at the HDL level.
Excellent written and verbal communication skills.

Responsibilities

Work closely with CesiumAstro engineers on FPGA circuits and systems through all phases of the development process.
Design, verification, testing, and deployment at the HDL level, including the development of relevant support software.
Present work to peers, mentors, and CesiumAstro executive leadership throughout the course of the summer.

At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands-on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward-thinking individuals to join our team.

CesiumAstro is a rapidly growing space technology startup based in Austin USA, with offices in Milton Keynes, UK. This internship will be based at our UK office.

We have a student placement opportunity for 12 weeks (negotiable) over the summer of 2024 at our UK office in Milton Keynes.

The ideal candidate will probably be studying for a degree in Electronics Engineering and will have an interest in DSP and communications technology, with a bias towards FPGA hardware and embedded systems design.

FPGA development interns work closely with CesiumAstro engineers on FPGA circuits and systems through all phases of the development process. Areas of focus will include design, verification, testing, and deployment at the HDL level, including the development of relevant support software. Assignments will be determined by a mix of project availability and the interests of the successful candidates.

CesiumAstro interns regularly present their work to peers, mentors, and CesiumAstro executive leadership throughout the course of the summer. As such, excellent written and verbal communication skills are required.

JOB REQUIREMENTS AND MINIMUM QUALIFICATIONS

Current enrolment in a Bachelor of Science (BSc), Master of Science (MSc), or PhD program in Electrical Engineering or Computer Engineering from an accredited university.
Good knowledge of Python.
Good knowledge of VHDL/Verilog.
Advanced coursework in design, analysis, and implementation of FPGA systems at the HDL level.
Excellent written and verbal communication skills.

PREFERRED EXPERIENCE

An understanding of basic digital communications and DSP.
Use of system development tools such as Xilinx Vivado or similar embedded FPGA development environment, including digital simulation tools.
Practical experience designing and building FPGA systems for a research project, competition team, extracurricular activity, or advanced engineering course.
Use of GIT or similar revision control system.
An understanding of RDL and its place in the design realisation workflow.

CesiumAstro considers several factors when extending an offer, including but not limited to, the role and associated responsibilities, a candidate’s work experience, education/training, and key skills.

CesiumAstro

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Website

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CesiumAstro specializes in developing software-defined phased array communication payloads for both airborne and in-orbit platforms, offering full-stack mission-ready communications for the Autonomous Era™. Their products include the VIREO multi-beam APA system, NIGHTINGALE I Ka-Band high-speed downlink payload, and the COMMPACK cross-link communications payload, all featuring modular hardware and software building blocks seamlessly integrated to provide complete mission-specific payload configurations. These products utilize active phased array systems and digital backend modules to support high-throughput communication needs.

Company Stage

N/A

Total Funding

$120.2M

Headquarters

Austin, Texas

Founded

2017

Growth & Insights

Headcount

6 month growth

↑ 18%

1 year growth

↑ 44%

2 year growth

↑ 102%

INACTIVE