Fellow CPU Architect
AI Silicon
Posted on 12/30/2022
INACTIVE
Tenstorrent

201-500 employees

Builds next-generation computers for AI applications
Company Overview
Tenstorrent, a global leader in AI computing, offers a unique work environment that fosters collaboration among experts in computer architecture, ASIC design, advanced systems, and neural network compilers. The company's competitive edge lies in its scalable RISC-V design, a testament to its commitment to technical innovation. With a diverse and inclusive culture spread across offices in Canada, the U.S., Belgrade, and Bangalore, Tenstorrent provides ample opportunities for growth and learning in the rapidly evolving AI industry.
AI & Machine Learning
Hardware

Company Stage

Series C

Total Funding

$334.5M

Founded

2016

Headquarters

Toronto, Canada

Growth & Insights
Headcount

6 month growth

20%

1 year growth

61%

2 year growth

161%
Locations
Austin, TX, USA
Experience Level
Entry
Junior
Mid
Senior
Expert
Desired Skills
Data Structures & Algorithms
C/C++
Data Analysis
CategoriesNew
AI & Machine Learning
Requirements
  • BS/MS/PhD in EE/ECE/CE/CS
  • Strong background in CPU ISA's, u-architecture research, and performance benchmarks
  • Proficient in C/C++ programming. Experience in the development of highly efficient C/C++ CPU models
Responsibilities
  • Collaborate with the software team and platform architecture team to understand CPU hardware requirements for AI accelerator compiler, OS, video/image/voice processing, security, networking, and virtualization technology. Identify the application performance bottlenecks and functional requirements
  • Identify representative benchmarks for the software applications. Perform data-driven analysis based on simulation or analytical models to evaluate software, architecture, and u-architecture solutions to improve performance and power efficiency or reduce hardware
  • Set CPU architecture direction based on the data analysis and work with a cross-functional team to achieve the best hardware/software solutions to meet PPA goals
  • Develop a cycle-accurate CPU model that describes the microarchitecture, uses it for evaluation of new features
  • Collaborate with RTL and Physical design engineers to make power, performance, and area trade-offs
  • Drive analysis and correlation of performance feature both pre and post-silicon
Desired Qualifications
  • Understanding SOC fabric, coherency protocols, memory technology, and accelerator technology is a plus
  • Prior experience or strong understanding of ML/AI algorithms, compiler, and OS kernel is a plus