Full-Time
Posted on 7/31/2025
High-performance AI computing hardware and software
$100k - $500k/yr
Remote in USA
Remote
US Citizenship, US Top Secret Clearance Required
Tenstorrent designs high-performance AI computing systems that combine specialized hardware with a software stack. Its products include AI-focused computers built with custom ASICs and RISC-V cores, plus neural network compilers that map models efficiently onto the hardware. The company differentiates itself by offering an end-to-end hardware-and-software platform optimized for AI workloads across data centers and edge environments. Its goal is to provide versatile, high-performance systems and software that help clients train, deploy, and run large-scale AI models more efficiently.
Company Size
1,001-5,000
Company Stage
Series D
Total Funding
$1.3B
Headquarters
Toronto, Canada
Founded
2016
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Hybrid Work Options
Tenstorrent has unveiled TT-QuietBox 2, the first RISC-V-based AI workstation with a fully open-source stack, starting at $9,999. The liquid-cooled desktop system can run models up to 120 billion parameters locally and delivers teraflop-class inference. The timing addresses a shift in AI infrastructure spending, where inference now accounts for over 55% of cloud AI spending at $37.5 billion. The workstation offers an alternative to per-token cloud fees and proprietary hardware stacks. Performance highlights include running Llama 3.1 70B at 476.5 tokens per second and predicting protein structures in 49 seconds—a task taking CPUs 45 minutes. The system handles diverse applications from large language models and image generation to scientific research, all whilst maintaining privacy through local processing.
AI chip startup Tenstorrent in talks to raise $800M in funding at a $3.2B valuation led by Fidelity. Toronto-based AI startup Tenstorrent is drawing investor attention once again as the race for AI compute intensifies. The company is reportedly in advanced talks to raise $800 million in new funding at a valuation close to $3 billion, with Fidelity Management & Research leading the discussions, according to an exclusive report from The Information. If finalized at the reported pre-money mark of roughly $3.2 billion, the round would lift Tenstorrent above its $2.6 billion valuation from its nearly $700 million Series D in December 2024. The speed of this jump underscores what many investors are signaling across the sector: the market is hungry for alternatives to Nvidia's dominance. "Chip startup Tenstorrent has been in talks to raise at least $800 million in a deal led by current investor Fidelity Management, according to two people with direct knowledge of the talks. The investment would value the Toronto-based firm at around $3.2 billion before the investment," The Information reported. Founded in 2016 by Ljubisa Bajic, Milos Trajkovic, and Ivan Hamer, Tenstorrent began as a small engineering-led effort before pulling in one of the most influential chip architects of the last two decades. Jim Keller, whose fingerprints are on major CPU and neural engine programs at Apple, Tesla, AMD, and Intel, joined the company as CTO in 2020 and took over as CEO earlier this year. Keller has spoken publicly about the structural disadvantages new chipmakers face against Nvidia. "You can't beat Nvidia if you use HBM," he said in a Bloomberg interview last December, pointing to prohibitive memory costs that box out most competitors. Tenstorrent nears $3.2B valuation as Fidelity doubles down on the Nvidia challenger. Tenstorrent's approach breaks from that model. The company has been building high-performance processors using RISC-V - an open instruction set architecture that has grown in credibility across the semiconductor community. RISC-V offers freedom from licensing costs associated with x86 and Arm, which is one reason the design has gained traction among research labs, startups, and some automotive teams. Tenstorrent's processors, including its Grayskull and Wormhole lines, target both cloud training and edge inference. The company has committed to a twice-yearly hardware release pace, an unusual tempo in a sector where new silicon can take years to ship. Its strategy isn't dogmatic, though. While some of its chips rely on RISC-V, the upcoming Samsung-manufactured Quasar product does not. This flexibility reflects a reality well understood by engineers: different customers have different requirements, and no single instruction set solves every problem. This nuance has helped Tenstorrent carve a technically credible position in an area where developers care deeply about interoperability and cost. The company's investor base has followed that effort closely. Fidelity first backed Tenstorrent in 2021 with a $200 million Series C that pushed the company to unicorn status. In 2023, a $100 million convertible note brought in strategic support from Hyundai Motor Group and Samsung Catalyst Fund, which signaled early confidence from major players examining AI integration in cars and consumer electronics. By December 2024, Tenstorrent closed an oversubscribed Series D co-led by Samsung Securities and AFW Partners. Bloomberg reported the round at roughly $700 million, with participation from Bezos Expeditions, LG Electronics, Baillie Gifford, and the Healthcare of Ontario Pension Plan. In total, Tenstorrent has raised more than $1.18 billion across 10 rounds. The company has also secured nearly $150 million in customer contracts. These include agreements with Samsung for manufacturing and Hyundai for automotive AI systems, giving the company a mix of revenue sources that extend beyond traditional cloud providers. Tenstorrent has expanded across Toronto, Austin, Silicon Valley, Belgrade, Tokyo, Bangalore, Singapore, and Seoul to support growing design and engineering demands. The broader context strengthens the significance of this potential raise. Nvidia now holds over 80% of the AI accelerator market and regularly posts quarterly data center revenue exceeding $30 billion. That scale is precisely what makes the emergence of credible challengers so rare. Still, investor interest has picked up across the board. Lightmatter reached a $4.4 billion valuation after a $400 million Series D last October, and Celestial AI raised $175 million earlier in 2024. These deals reflect a shared belief across venture firms and strategic investors that the AI compute stack is far from settled. Tenstorrent's pitch has resonated with developers wary of Nvidia's "walled garden," as some describe it. By avoiding HBM in favor of standard DDR memory and embracing modularity, the company aims to offer lower costs and more flexibility - attributes that remain meaningful as AI training budgets balloon. Yet Tenstorrent's challenges are real. The company's revenue remains modest relative to Nvidia's scale, and its chip production relies on TSMC and Samsung, two companies deeply exposed to geopolitical pressures and supply chain volatility. If the new Fidelity-led round closes, Tenstorrent would have the capital to accelerate its next-gen hardware roadmap, build new training server designs, and expand its IP licensing strategy for companies designing custom silicon. The AI chip sector is projected to hit $83 billion in sales by 2027, a steep climb from $5.7 billion in 2018, and that trajectory continues to pull new entrants into the race. Tenstorrent is betting that openness - in design, architecture, and cost structure - can create an alternative path for developers who want out of Nvidia's gravitational pull. Whether that bet pays off is a question the entire industry is watching closely. But in a moment where compute has become the bottleneck for AI progress, credible competitors matter, and Tenstorrent has made itself part of that conversation.
Tenstorrent unveils Open Chiplet Atlas to democratize chip design. Open Source Tools Open-source software Open Source Tenstorrent unveils the Open Chiplet Atlas Ecosystem, an open source architecture enabling plug-and-play chiplets. Tenstorrent has launched the Open Chiplet Atlas (OCA) Ecosystem, including the open standard OCA Architecture, aiming to create a truly open chiplet market. The ecosystem aims to democratise chip design, reduce development costs, and accelerate innovation by enabling heterogeneous chiplets for plug-and-play interoperability. Over 50 partners have joined the initiative, spanning leading semiconductor companies, global conglomerates, and academic institutions. Traditional monolithic system-on-chip (SoC) designs are increasingly complex, expensive, and time-consuming. The OCA Ecosystem addresses these challenges by standardising chiplet interoperability across physical, transport, protocol, system, and software layers. The OCA Architecture is modular, open source, and ISA/IP neutral, free from vendor lock-in. It provides greater design flexibility and faster time-to-market across AI accelerators, automotive solutions, and data centre products. Draft v0.7 of the OCA Architecture Specification is publicly available at Open Chiplet Atlas. "The future of silicon is heterogeneous and composable," said Wei-han Lien, Chief Architect at Tenstorrent. "The OCA Ecosystem establishes the foundation of trust and interoperability needed to unlock the full potential of multi-vendor chiplet-based SoC products. This is not just a new standard - it's the beginning of a collaborative community that will drive the next generation of system innovation. The OCA Ecosystem starts a new silicon design paradigm." The OCA Ecosystem is built on three pillars: Architecture, defining interoperability across five layers; Harness, an open source design framework enabling automatic interoperability; and Compliance, ensuring end-to-end verification with a "Golden Chiplet" and community Plugfests. The open source approach empowers designers worldwide to adopt, contribute, and collaborate, accelerating innovation and driving a new community-driven chip design paradigm. Open Source Tools
08/06/2025 " Ashling announces riscfree(tm) debug and trace support for Tenstorrent tt-ascalon(tm) RISC-V CPUs... Silicon Valley, CA - August 6th, 2025 - Ashling today announced full debug and trace support for Tenstorrent's Ascalon RISC-V CPU within its RiscFree SDK. RiscFree provides comprehensive visibility and control across the entire software stack - from low-level drivers to high-level application code. With features including breakpoints, step/continue execution, register and memory inspection, real-time trace, and multi-core support (both homogeneous and heterogeneous), RiscFree enables efficient debugging, tracing and performance tuning of complex embedded systems. This collaboration ensures that developers targeting Tenstorrent's high-performance Ascalon RISC-V cores can now rely on a robust and proven tool chain to accelerate development, debugging, and system validation. TT-Ascalon is Tenstorrent's high-performance RISC-V CPU, built on open standards to provide maximum flexibility and architectural control. It is based on the open RISC-V ISA and is RVA23 compliant. With support for two to eight cores per cluster and a configurable shared L2 cache, Ascalon is designed to scale across a wide range of applications. Ascalon also supports CHI.E and AXI5-LITE interfaces and incorporates a TrustZone-equivalent security model built on RISC-V primitives, delivering high performance density while maintaining an open, vendor-neutral foundation. A central focus of the Ashling - Tenstorrent collaboration is comprehensive trace support, built on the RISC-V standard N-Trace architecture. RiscFree integrates with Tenstorrent's Ascalon CPUs to capture detailed trace data across multi-core systems, enabling real-time visibility into instruction execution, memory transactions, and key system events. "Trace is critical for understanding software behaviour on complex SoCs, especially when debugging subtle timing or interaction issues," said Hugh O'Keeffe, CEO of Ashling. "By supporting standardised RISC-V N-Trace, we ensure that developers can rely on open, interoperable tooling for trace capture and analysis." In addition to N-Trace, Tenstorrent's Debug Signal Trace (DST) infrastructure has been fully implemented in its Ascalon CPUs, providing access to critical micro-architectural signals alongside standard trace data during post-silicon validation. DST enhances debugging, performance analysis, and coverage, and is fully supported by Ashling's RiscFree tools - enabling deep trace visibility with minimal integration overhead. "DST is now fully integrated into the Ascalon platform, and with its support in tools like RiscFree, the RISC-V ecosystem is now empowered to seamlessly adopt DST in their IP implementations," said Sajosh Janarthanam, Lead Engineer at Tenstorrent. "By standardising access to low-level trace signals, we're reducing debug complexity and improving the overall RISC-V development experience. Our contribution of an open Debug Signal Trace specification to the community reflects Tenstorrent's commitment to open-source innovation - lowering integration costs and enabling more capable and accessible debug and trace solutions across the RISC-V ecosystem." About Tenstorrent. Tenstorrent is a next-generation computing company that builds computers for AI. Headquartered in North America with locations in Toronto, Austin, Boston, and Silicon Valley, and global offices in Belgrade, Tokyo, Bangalore, and Seoul, Tenstorrent brings together experts in computer architecture, ASIC design, advanced systems, and neural network compilers. Backed by Eclipse Ventures and Real Ventures, among others. Learn more at www.tenstorrent.com. About Ashling. Ashling is a world leader in the development of tools and solutions for embedded systems and the semiconductor industry. With a focus on enabling software design for next-generation processors and SoCs, Ashling offers cutting-edge debugging tools, trace probes, and development environments. Contact Ashling | [email protected]
Hyundai and Kia are investing a combined $50 million in Toronto-based semiconductor startup Tenstorrent as part of a $100 million funding round led by Hyundai Motor Group and the Samsung Catalyst Fund. The investment aims to develop optimized semiconductors for CPUs and NPUs for future vehicles and mobility applications, addressing the rising demand for semiconductors and powerful processors in advanced autonomous driving technologies.