Full-Time

Senior Field Applications Engineer

Updated on 6/5/2024

Astera Labs

Astera Labs

201-500 employees

Semiconductor connectivity solutions for AI and cloud

Hardware

Compensation Overview

$130k - $190kAnnually

Senior

Santa Clara, CA, USA

Required Skills
Printed Circuit Board (PCB) Design
Git
Requirements
  • BS in electrical engineering
  • Minimum of 5 years’ experience working with Cloud service providers and server OEM customers
  • Excellent written and verbal communication skills
  • Strong organization skills
  • Customer-oriented, Goal-driven, Self-motivated
  • Entrepreneurial, open-mind behavior
  • Hands-on, thorough knowledge of high-speed protocols like PCIe & Ethernet
  • Silicon/System bring-up and debug experience
  • Experience with lab equipment including protocol analyzers and oscilloscopes
  • Intermediate level of proficiency in Python
  • Able to step through embedded firmware at the SerDes (SoC) or MCU level
  • Firsthand experience with lab equipment including traffic generators, analyzers, and high-speed oscilloscopes
  • Strong working knowledge of a high-speed interface at a physical layer level
  • Development, support, and experience with PCIe ICs
  • Experience in embedded SW debug or development with firmware, drivers, and BIOS using PCIe technology
  • Working knowledge of software/firmware build environments, gcc/Make and GitHub
  • Knowledge of simulation/modeling, schematic capture, and PCB layout tools
  • Knowledge of simulation tools such as Keysight ADS, Mathworks QCD, etc.
Responsibilities
  • Supporting cloud service providers, server and network OEMs
  • Designing solutions using Astera Labs' connectivity products
  • Identifying and understanding customer requirements
  • Proposing solutions that provide clear value to customers
  • Providing hands-on design-in support
  • Driving innovation by working with engineering teams
  • Delivering results back to customers

Astera Labs specializes in semiconductor-based connectivity solutions, including PCIe, CXL, and Ethernet technologies, designed to optimize cloud and AI infrastructure by addressing performance bottlenecks in data-centric systems. Their purpose-built products enable high-bandwidth, low-latency interconnects for compute, storage, and accelerator resources, as well as robust CXL and PCIe connectivity for GPUs, AI accelerators, and networking applications.

Company Stage

IPO

Total Funding

$739.4M

Headquarters

Santa Clara, California

Founded

2017

Growth & Insights
Headcount

6 month growth

28%

1 year growth

55%

2 year growth

140%