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SI/Pi – Package and board level
Full time
Confirmed live in the last 24 hours
Locations
Austin, TX, USA • Mountain View, CA, USA
Experience Level
Entry
Junior
Mid
Senior
Expert
Requirements
  • Domain expert on model extraction, frequency and time domain simulation tools such as Cadence PowerSI, XtractIM, Clarity, Ansys SIwave, Q3D, HFSS, designer, Synopsys Hspice, Keysight ADS
  • Expertise on DDR, PCIE electrical spec and compliance requirement
  • Expertise on power delivery networks such as various power supply modules, decaps, Vdroop budgeting, CPM model and current profile generation, validation
  • Experience with advanced package and PCB technology
  • Hands on experience with various lab equipment: TDR, VNA, real time oscilloscope
  • Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated
  • PhD, Master's Degree with 3-11 years of experience in technical subject area
Responsibilities
  • Build end to end simulation models for high speed interfaces (DDR/PCIE, etc), find solution path and design space, come up with routing rules, implement them in constraint manager files
  • Build end to end simulation models for power delivery network, evaluate Vdroop contribution from various components (VRM, PCB, socket, package, silicon etc), define PDN requirements, and come up with solution recommendations
  • Model extraction of all components: PCB, connectors, socket, package substrate, and drive silicon model extraction and validation
  • Define package and PCB stack-up, material selection, decoupling capacitor selection, routing rule development
  • Work closely with package designers, PCB designers, EE, power engineers, thermal/mechanical engineers, package and PCB technologists to implement the designs, optimize for performance and perform sign off simulations
  • Validate bare substrate, PCB, socket, connector interconnect performance and PDN measurement in lab
  • Fully involved in silicon and board bring up, functional and performance validation, debug triage, and compliance test
  • Own and contribute to SIPI methodology development, lab build-up
Rivos

51-200 employees

High performance CPUs & RISC-V
Company Overview
Rivos is a startup in stealth-mode.