Lead Engineer – Physical Design - Pd

<strong>Job Requirements </strong><br><p>At Quest Global, it’s not just what we do but how and why we do it that makes us different. With over 25 years as an engineering services provider, we believe in the power of doing things differently to make the impossible possible. Our people are driven by the desire to make the world a better place—to make a positive difference that contributes to a brighter future. We bring together technologies and industries, alongside the contributions of diverse individuals who are empowered by an intentional workplace culture, to solve problems better and faster.</p><p>a { text-decoration: none; color: #464feb; } tr th, tr td { border: 1px solid #e6e6e6; } tr th { background-color: #f5f5f5; }</p><p>ob Summary</p><p>We are seeking an experienced <strong>Lead Engineer – Physical Design</strong> to lead the implementation of complex ASIC/SoC designs from netlist to GDSII. The candidate will be responsible for floorplanning, placement, clock tree synthesis, routing, timing closure, power optimization, physical verification support, and tapeout activities across advanced technology nodes.</p><p>The ideal candidate should have extensive experience in SoC implementation, timing closure, low-power design methodologies, and advanced node physical design challenges.</p><p>Key Responsibilities</p><ul><li>Lead end-to-end Physical Design implementation from Netlist to GDSII.</li><li>Perform and optimize:<ul><li>Floorplanning</li><li>Power Planning</li><li>Placement</li><li>Clock Tree Synthesis (CTS)</li><li>Routing</li><li>Physical Signoff Preparation</li></ul></li><li>Analyze and close setup and hold timing violations across MMMC scenarios.</li><li>Optimize design for PPA (Power, Performance, and Area).</li><li>Collaborate with RTL, Synthesis, STA, DFT, PV, and Packaging teams.</li><li>Drive congestion analysis and routing closure.</li><li>Perform ECO implementation and timing closure.</li><li>Support IR drop, electromigration (EM), and power integrity analysis.</li><li>Ensure design compliance with foundry requirements and signoff criteria.</li><li>Participate in tapeout readiness reviews and final GDS release.</li><li>Develop and enhance automation scripts for design implementation flows.</li><li>Mentor junior engineers and provide technical leadership.</li></ul><p> </p><p>We are known for our extraordinary people who make the impossible possible every day. Questians are driven by hunger, humility, and aspiration. We believe that our company culture is the key to our ability to make a true difference in every industry we reach. Our teams regularly invest time and dedicated effort into internal culture work, ensuring that all voices are heard.</p><p> </p><p>We wholeheartedly believe in the diversity of thought that comes with fostering a culture rooted in respect, where everyone belongs, is valued, and feels inspired to share their ideas. We know embracing our unique differences makes us better, and that solving the worlds hardest engineering problems requires diverse ideas, perspectives, and backgrounds. We shine the brightest when we tap into the many dimensions that thrive across over 21,000 difference-makers in our workplace.</p><br><br>