Omni Design Technologies

Licenses high-performance IP cores for SoCs

DFT Engineer

Hardware Validation & TestingConfirmed live in the last 24 hours

Full-timeBengaluru, Karnataka, IndiaNo salary listedHybrid

About the Job

Requirements

Hands-on expertise with commercial test-generation tools for large, complex designs.
Strong fundamental knowledge of design-for-test techniques, including JTAG, automatic test pattern generation, test pattern translation, yield learning, logic diagnosis, scan compression, IEEE 1500, memory built-in self-test, and logic built-in self-test.
At least 5 years of experience in DFT flows for a product company.
A B.E., B.Tech., M.E., or M.Tech. degree in VLSI.
Strong fundamentals in digital ASIC design and experience with ASIC test, DFT, and debugging.
Experience with RTL simulation, synthesis, and back-end implementation flows.
Experience defining and implementing stuck-at and at-speed testing techniques.
Experience running test-compression flows.
Experience balancing test options against product performance and schedule requirements.
Experience creating and releasing complete test programs for device screening.
Knowledge of full DFT flows, including test-structure insertion, pattern generation, and simulation.
Hands-on experience with Cadence Genus and Modus tools.
Good understanding of Verilog and VHDL.
Exposure to low-power techniques.
Knowledge of Tcl and Python scripting.

Responsibilities

Drive the required DFT flows for digital designs.
Work closely with RTL and physical-design teams to drive testability.
Generate test patterns and analyze and debug test failures.
Optimize tests.
Resolve DFT-related design and flow issues, identify potential solutions, and drive their execution.
Define DFT strategies and methodologies.
Define test structures, debug structures, and test plans.
Create test vectors and simulate designs in various modes.
Collaborate with the physical-design team to close requirements.
Validate that DFT requirements are met.
Work with designers to increase test coverage, debug observability, and flexibility.
Verify that post-physical-design implementations meet DFT requirements.

We are looking for an experienced DFT engineer, who is capable of driving the required DFT flows for our digital designs. The ability to work closely with rtl and pnr design team to drive testability is a key feature of this role!

Qualifications

Hands-on expertise with commercial test generation tools for large complex designs
Strong fundamental knowledge of DFT techniques include JTAG, ATPG, test pattern translation, yield learning, logic diagnosis, scan compression, IEEE 1500 Standard, MBIST and LBIST
Experience generating test patterns and analyzing and debugging test failures
Experience with RTL simulation, synthesis and back end implementation flows
Experience defining and implementing stuck-at and at-speed techniques
Experience running test compression flow
Experience trading off test options with product performance and schedule requirements
Experience creating and releasing full test programs for device screening
Test optimization
Resolve design and flow issues related to DFT, identify potential solutions, and drive execution

Education and Experience

B.E./B.Tech./M.E./M.Tech in VLSI
Minimum of 5 years of working experience in DFT flow of a product company.
Strong fundamentals in digital ASIC design, experience with ASIC test, DFT, and debug

Detailed Responsibilities and Skills

Define DFT strategy and methodologies
Define test structures, debug structures, test plans
Create test vectors, simulate in various modes
Collaborate with physical design team to close requirements
Validate DFT requirements are being met
Work with designers to increase test coverage, debug observability and flexibility
Verify post-PD designs meet DFT requirements
Knowledge of full DFT flow (test structure insertion, pattern generation, simulation )
Hands-on experience with Cadence Genus, Modus tools,
Should have good understanding of Verilog/VHDL
Exposure to low power techniques
Knowledge of TCL and Python scripting is a must

We are looking for trailblazers ...

We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by Omni Design’s IP cores and the rapidly emerging semiconductor embedded design business ecosystem.

At Omni Design, we have created an exciting environment with amazing talent across multiple disciplines. We like self-motivated individuals, we encourage initiative, we look for leadership qualities, we value teamwork, we like diversity, and we reward excellence. We are looking for trailblazers to bring Omni Design’s vision to fruition.

If you are interested in making an impact as part of a young, fast growing, cutting edge technology company, please reach out to us.

Omni Design is an equal opportunity employer. We offer excellent compensation. We seek individuals that share our high standards and commitment to excellence.

About the Company

Omni Design Technologies

Licenses high-performance IP cores for SoCs

Omni Design Technologies delivers high-performance, ultra-low power IP cores for mixed-signal SoCs that power devices across 5G, LiDAR, automotive networks, AI, image sensing, and IoT. It develops and validates IP blocks and licenses them to chip makers, offering customization and support to ensure seamless integration into customer designs. The cores are designed to work on FinFET processes down to 28nm, with proven silicon such as gigasample low-power ADCs and DACs on TSMC 28nm. The company differentiates itself through validated, silicon-proven IP, deep collaboration with customers and partners (e.g., LeddarTech, MegaChips), and a global design footprint (new Fort Collins design center). Its goal is to enable customers to build sophisticated, power-efficient, mixed-signal SoCs quickly by providing ready-to-license IP plus engineering services that fit their specific needs.

Company size: 51-200
Company stage: Series A
Total funding: $35M
Headquarters: Milpitas, CA
Founded: 2015

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