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Normal Computing

Develops probabilistic AI for enterprise applications

Design Verification Engineer

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-time$200k - $400k /yr

About the Job

Requirements

  • At least 5 years of experience in digital design verification for complex ASICs, SoCs, or IPs.
  • Advanced proficiency in SystemVerilog, UVM, SystemVerilog Assertions (SVA), and constrained-random verification.
  • Experience in end-to-end verification, including verification planning, testbench architecture, stimulus generation, scoreboards, and functional coverage closure.
  • Strong understanding of industry-standard protocols such as AXI, APB, AHB, or other SoC interconnects.
  • Experience with EDA simulation, debugging, and coverage tools such as Cadence Xcelium, SimVision, vManager, Synopsys VCS, or Verdi.
  • Scripting and automation skills using Python, Tcl, or similar languages.
  • Experience developing reusable verification environments and debugging complex RTL and system-level issues.
  • Ability to work across hardware and software teams.

Responsibilities

  • Own end-to-end verification of internal ASICs, including verification planning, testbench development, assertions, functional coverage, regression, and coverage closure through tapeout.
  • Develop scalable SystemVerilog/UVM verification environments, reusable VIP, scoreboards, reference models, and verification methodologies across IP, subsystem, and SoC levels.
  • Develop and integrate AI-assisted verification workflows, including specification analysis, test planning, testbench generation, debugging, and coverage closure.
  • Review AI-generated verification collateral and help define quality standards for the team's verification tools.
  • Build and maintain regression infrastructure, CI/CD integration, coverage analysis, and EDA tool flows for efficient and repeatable ASIC verification.
  • Work with architecture, RTL design, physical design, and software teams to identify verification requirements, resolve design ambiguities, and drive silicon quality.

Desired Qualifications

  • Experience building verification infrastructure and methodologies from the ground up for a new ASIC program.
  • Hands-on experience using LLMs, AI coding assistants, or agentic tools for RTL design and verification.
  • Experience with formal verification, power-aware verification, or emulation.
  • Exposure to AI accelerators, memory subsystems, in-memory computing, or unconventional compute architectures.

About the Company

Normal Computing

Develops probabilistic AI for enterprise applications

Normal Computing builds AI systems for large, mission-critical workloads and provides generative AI tailored for enterprises. It uses Probabilistic AI, which uses statistical analysis to predict outcomes, giving firms more control over reliability, adaptability, and auditability. The company differentiates itself through leadership from Google Brain, Palantir, and X, and by focusing on risk-aware, enterprise-grade AI for industries with strict risk constraints. Its goal is to help Fortune 500 companies and government agencies deploy AI in critical operations with strong reliability, clear audit trails, and manageable risk.

Company size
51-200
Company stage
Early VC
Total funding
$133M
Headquarters
New York City, New York
Founded
2022

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