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Velaura

Designs energy-efficient AI silicon and systems

Design Verification Engineer

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeBengaluru, Karnataka, IndiaIn-person

About the Job

Requirements

  • Experience verifying complex digital systems.
  • Strong understanding of computer architecture, microarchitecture, system-on-chip architecture, and digital design fundamentals.
  • Experience with SystemVerilog, Universal Verification Methodology, C/C++, assertions, coverage-driven verification, and related methodologies.
  • Familiarity with formal verification techniques and tools.
  • Understanding of memory systems, interconnect fabrics, caches, direct memory access engines, processors, or accelerator architectures.
  • Experience debugging complex system-level issues.
  • Ability to work effectively in a collaborative, multidisciplinary engineering environment.

Responsibilities

  • Develop and execute verification strategies for key portions of the Velaura system-on-chip.
  • Build verification environments using SystemVerilog, Universal Verification Methodology, C/C++, assertions, formal verification, emulation, and related methodologies.
  • Collaborate with architects and register-transfer-level engineers to define verification plans, coverage goals, and correctness criteria.
  • Verify compute engines, memory subsystems, interconnect fabrics, control processors, direct memory access engines, and other critical system-on-chip infrastructure.
  • Perform hardware/software co-verification involving firmware, drivers, runtime software, and operating system interactions.
  • Verify performance, latency, bandwidth, quality of service, and real-time system behavior under representative workloads.
  • Develop assertions, checkers, scoreboards, and automated verification infrastructure.
  • Participate in emulation, field-programmable gate array prototyping, and pre-silicon software bring-up activities.
  • Drive bug investigation, root-cause analysis, and debugging across hardware and software boundaries.
  • Perform post-silicon debugging and root-cause analysis.
  • Use modern engineering tools, including artificial-intelligence-assisted verification workflows, to improve productivity, quality, and coverage.
  • Contribute to technical excellence and continuous improvement.

Desired Qualifications

  • Experience with one or more of the following standards: ISO 26262, IEC 61508, IEC 61511, or ISO 13849.
  • Experience with artificial intelligence, machine learning, or edge artificial-intelligence hardware.
  • Familiarity with robotics, drones, autonomous vehicles, or industrial automation systems.
  • Experience verifying quality of service, latency-sensitive, or real-time systems.
  • Experience with hardware/software co-verification and system-level validation.
  • Exposure to performance modeling, profiling, and workload characterization.
  • Experience using modern artificial intelligence tools and workflows to accelerate engineering productivity.
  • Background in CPUs, GPUs, artificial-intelligence accelerators, networking and communications silicon, storage and data movement architectures, robotics and autonomous systems, automotive and advanced driver-assistance systems platforms, aerospace and defense systems, real-time and safety-critical computing, or functional safety architectures and methodologies.

About the Company

Velaura

Designs energy-efficient AI silicon and systems

Velaura AI designs and manufactures ultra-energy-efficient AI infrastructure, including 3nm ASIC chips, Teraflux mining systems, FluxVision fleet-management software, and AuraLinks rack-level networking. Customers deploy the hardware in data centers, while FluxVision monitors and manages fleets; EnergyTune and AutoTune dynamically adjust power to meet grid stability, and AuraLinks reduces bottlenecks in AI training and inference. The company differentiates itself with a team of silicon architects from Apple, Google, and Qualcomm, plus a patent-pending energy-management approach and a fully integrated hardware-software stack. Its goal is to enable massive AI deployment by delivering powerful, energy-efficient compute and networking that aligns with sustainable energy grids and domestically produced technology.

Company size
51-200
Company stage
Series A
Total funding
$424M
Headquarters
Santa Clara, CA
Founded
2022

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