C

Cisco

Makes networking gear and security software

Failure Analysis Engineering Technical Leader

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeTaipei City, TaiwanNo salary listedHybrid

About the Job

Requirements

  • A bachelor's degree in Electrical Engineering, Electronics Engineering, Materials Science, Physics, or a related field is required.
  • At least 10 years of experience in semiconductor electrical and physical failure analysis, with a strong focus on advanced packaging ASIC products.
  • Hands-on experience with electrical fault isolation techniques including automated test equipment, Scan/Automatic Test Pattern Generation, Memory Built-In Self-Test, emission microscopy, optical beam induced resistance change, time-domain reflectometry, soft-error injection, and laser scanning microscopy.
  • Strong experience with physical failure-analysis tools and methodologies including focused ion beam, scanning electron microscopy, transmission electron microscopy, cross section, X-ray, and C-mode scanning acoustic microscopy.
  • Proven experience with advanced packaging reliability and package-interaction failure mechanisms.
  • Strong understanding of semiconductor device physics, package structure, assembly process flow, and reliability stress behavior.
  • Experience developing failure-analysis strategies and driving root-cause analysis to closure.
  • Strong technical leadership and structured problem-solving skills.
  • Ability to lead cross-functional and supplier discussions for complex reliability and quality issues.
  • Comfort working in both laboratory and manufacturing environments.
  • Ability to manage multiple high-priority failure-analysis cases simultaneously.
  • Ability to work effectively in fast-paced, global engineering environments.

Responsibilities

  • Conduct electrical and physical failure analysis for advanced packaging ASIC products, including reliability failures, yield excursions, customer returns, and field failures.
  • Perform electrical fault isolation using automated test equipment, Scan/Automatic Test Pattern Generation, Memory Built-In Self-Test, time-domain reflectometry, emission microscopy, optical beam induced resistance change, soft-error injection, and laser scanning microscopy techniques.
  • Drive physical failure-analysis activities using cross section, focused ion beam, scanning electron microscopy, transmission electron microscopy, X-ray, C-mode scanning acoustic microscopy, decapsulation, and material-analysis methods.
  • Investigate advanced packaging failure mechanisms such as bump crack, copper pillar fracture, redistribution-layer cracking, through-silicon-via defects, substrate warpage, delamination, electromigration, solder fatigue, die crack, and thermomechanical-stress-related failures.
  • Develop failure-analysis strategies for intermittent and low-reproducibility failures under reliability-stress conditions.
  • Correlate electrical signatures with physical defects to identify root causes across silicon, package, surface-mount-technology, and system-level interactions.
  • Drive technical reviews and root-cause investigations with outsourced semiconductor assembly and test providers, foundries, substrate suppliers, and assembly partners.
  • Support new-package-technology qualification and risk-assessment activities.
  • Develop and improve failure-analysis methodologies, workflows, and standard operating procedures for advanced packaging technologies.
  • Document and communicate failure-analysis findings, corrective actions, and technical risk assessments to management and cross-functional teams.

Desired Qualifications

  • Experience with 2.5D/3D packaging, flip chip, wafer-level packaging, fan-out packaging, hybrid bonding, through-silicon vias, and high-density substrate technologies.
  • Knowledge of JEDEC reliability qualification standards and failure mechanisms under thermal cycling, high-temperature operating life, highly accelerated temperature and humidity stress, drop, bend, and surface-mount-technology processes.
  • Experience with outsourced semiconductor assembly and test process integration, package process mapping, and supplier quality management.
  • Familiarity with customer-return investigation, field-reliability analysis, and high-volume manufacturing support.
  • Experience driving technical alignment across foundry, outsourced semiconductor assembly and test, substrate, and internal engineering teams.
  • A master's degree.

About the Company

Cisco

Makes networking gear and security software

Cisco makes the switches and routers that connect offices, data centers, and cloud services, and it also sells cybersecurity tools and Webex video meetings to businesses and governments. It was one of the first companies to sell routers that let different kinds of computer networks exchange data, and in 2000 it briefly became the world's most valuable company. Customers run its network gear, from Wi-Fi access points to AI data center systems, with Cisco software that sets up and secures the network, while its Splunk unit searches computer logs to catch outages and attacks. Cisco earns money from hardware sales, software subscriptions, and support contracts. It was founded in 1984 and is based in San Jose, California.

Company size
10,001+
Company stage
IPO
Headquarters
San Jose, CA
Founded
1984

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