CMOS Mixed-Signal Circuit Design Engineer
Analog Bits
CMOS Mixed-Signal Circuit Design Engineer
Analog Bits
Mixed-signal IP for power management
About Analog Bits, Inc.
Analog Bits is the leader in mixed signal IP at leading edge process nodes. We specialize in developing advanced mixed signal circuits for low power, high-speed, Fin-FET mixed-signal and analog IPs that are used in numerous products from high performance data center SoCs to low power consumer SoCs.
The company is known for its trusted track record and globally respected team and goes beyond off-the-shelf offerings with flexible, tailor-made solutions. The team goes beyond best-in-class IP and superior service.
About the role
Join our European Design Center in Prague, Czech Republic a key part of our globally recognized circuit design team, and work on cutting-edge CMOS technologies including FinFETs and GAA. We are one of the very few companies in Europe actively designing with these advanced nodes—powering next-generation SoCs for data centers, AI, automotive and low-power IOT and edge AI devices.
Based in Prague — one of Europe’s most safe, beautiful and livable cities—you’ll enjoy the unique opportunity to grow your career in a vibrant cultural hub while contributing to world-class semiconductor innovation. Our Prague center plays a pivotal role in developing high-impact mixed-signal IP for global customers.
What you'll do
Key Responsibilities:
Qualifications
Key Qualifications:
Education:
Be part of a technically elite, globally connected team pushing the frontiers of mixed-signal design from Prague — a city where innovation meets quality of life. If you're ready to help shape the future of chip design — right from the heart of Europe— we want to hear from you.
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Mixed-signal IP for power management
Analog Bits provides mixed-signal IP (intellectual property) for intelligent energy and power management used in semiconductor chips. Its products include precision clocking macros (PLLs, oscillators), sensors to monitor temperature and voltage, and power-control blocks (like LDOs), plus integrated or separate bandgap and ADC IP. A key feature is the patented pinless/core-powered IP, which lets IP blocks be placed anywhere on a chip without external power pins while preserving analog performance, enabling easier, more reliable integration into SoCs across major foundries. The company has a 30+ year track record with silicon-proven IP across processes from 0.35 micron to 2nm and a broad portfolio designed to improve performance, cost, and reliability in applications ranging from consumer electronics and edge AI to automotive and aerospace. Its goal is to provide differentiated, easy-to-integrate IP that reduces risk and accelerates power and energy management in modern chips.
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