Staff Site Reliability Engineer
Synopsys
Staff Site Reliability Engineer
Synopsys
EDA software for chip design
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow
You Are
You are a hands on Unix/Linux engineer who enjoys understanding how systems work and solving infrastructure problems at their root.
You have strong experience administering and troubleshooting Unix/Linux systems in production environments and are comfortable investigating performance, availability, configuration, networking, and system-level issues. You don't need to know every technology the team supports today. What matters is that you have a strong Unix/Linux foundation, good troubleshooting instincts, and the curiosity and technical appetite to quickly learn new systems.
You enjoy working close to the technology, investigating difficult problems, automating repetitive work, and improving the environment rather than simply maintaining it.
At Synopsys, you will apply those skills to large scale infrastructure supporting engineering teams globally. You will also have the opportunity to deepen your experience with HPC and grid computing environments, including workload management technologies such as IBM Spectrum LSF, Slurm, PBS Pro, and Grid Engine
What You'll Be Doing
The Impact You Will Have
What You'll Need
Who You Are
The Team You'll Be Part Of
You will join the team responsible for critical engineering infrastructure used by software engineering teams globally. The team supports infrastructure for a large global engineering community, including grid and high performance computing environments, workload scheduling platforms, and source code and development systems. You will collaborate with engineering and infrastructure teams across the US, Europe, India, and other global locations. This is a hybrid role based in the Bay Area with flexibility to work from our Sunnyvale office and remotely.
Rewards and Benefits
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
#LI-Hybrid
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.
Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.
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