A

AMD

Designs chips for computers and AI systems

AI Performance Modeling Engineer

Hardware EngineeringConfirmed live in the last 24 hours
Full-timeBengaluru, Karnataka, IndiaNo salary listedIn-person

About the Job

Requirements

  • Deep, hands-on understanding of large language model and Transformer performance, scaling techniques, parallel training and inference strategies including tensor, pipeline, and data parallelism, kernel execution graphs, and hardware mapping.
  • Hands-on experience with analytical performance models and execution-driven, architectural, or cycle-accurate simulators, with judgment about selecting model fidelity and a track record of using models to inform decisions.
  • Strong command of GPU execution pipelines, SIMD/SIMT models, cache hierarchy, memory technologies, and high-bandwidth interconnects such as PCIe and custom fabrics.
  • Expertise in modern C++ and production-grade Python.
  • Ability to turn noisy simulation data into clear, actionable findings for engineering stakeholders.

Responsibilities

  • Build and use analytical, architectural, and cycle-accurate models to project generative AI and large language model workload performance—including attention, general matrix-matrix multiplication, collectives, training, inference, and vision models—on the GPU architecture.
  • Select model fidelity appropriate to the question, using analytical bounds and roofline models for rapid trade-off exploration and architectural or cycle-accurate simulation for precise answers.
  • Identify and quantify performance effects from compute-engine occupancy, L1/L2 hierarchy, memory bandwidth, and system-on-chip fabric.
  • Characterize end-to-end AI workloads by tracing and profiling execution, extracting structural footprints, and translating them into microarchitectural bottlenecks and performance bounds.
  • Run architecture experiments to evaluate GPU configurations, scaling limits, and trade-offs against real AI workloads, supporting recommendations with sensitivity analysis and data.
  • Extend and maintain cycle-accurate or cycle-approximate simulators for GPU compute engines, cache hierarchies, memory subsystems, and interconnects used by AI workloads.
  • Run AI workloads on early silicon, capture telemetry, and correlate results with pre-silicon models to improve model fidelity.
  • Root-cause AI performance mismatches on physical silicon using low-level performance counters, register dumps, and Linux tracing.
  • Partner with compiler, runtime, and framework teams to translate model insights into optimizations and ground projections in actual workload execution.
  • Translate AI workload requirements into concrete architectural constraints while bridging architecture/RTL and software teams.

Desired Qualifications

  • Experience with NPU or AI-accelerator architecture, or modeling AI workloads on dedicated inference or training accelerators.

About the Company

AMD

Designs chips for computers and AI systems

AMD designs processors, graphics chips and AI accelerators for computer makers, cloud operators and businesses that build electronic devices. Its Ryzen processors power personal computers, while EPYC processors handle work in data centers and Radeon chips render graphics. Instinct accelerators run AI models, paired with software that developers use to train models and put them into production. AMD sells chips and related computing systems through equipment makers, distributors and retail channels, and contracts with outside foundries to fabricate its semiconductor designs. It was founded in 1969 and has its headquarters in Santa Clara, California.

Company size
10,001+
Company stage
IPO
Headquarters
Santa Clara, CA
Founded
1969

Recently Posted Jobs

Explore more opportunities at AMD

See more jobs