Volantis Semiconductor

Designs photonic AI compute hardware

XPU Architect

Silicon & ASIC DesignConfirmed live in the last 24 hours

Full-timeNo salary listed

About the Job

Requirements

Previous experience architecting and owning a high-performance, high-TDP ASIC, such as AI chips, network switch chips, high-performance CPUs, or similar.
Knowledge of computer architecture and silicon implementation, including understanding the realistic constraints silicon implementation places on architectural options.
Deep understanding of AI workloads, especially low-latency large language model inference.
Understanding of workload and system-level bottlenecks, especially in inference, relating to interconnect, memory capacity, bandwidth, and latency.

Responsibilities

Own the XPU compute engine architecture of the A-0 and A-1 systems.
Initially leverage existing third-party IP creatively to address bandwidth-demand challenges and memory-system interface challenges.
Architect future generations of semi-custom and custom XPU compute designs.

Desired Qualifications

Hands-on experience with AI chip architecture and tapeouts.
End-to-end ownership of at least one AI ASIC project.
History of product delivery, regardless of the product’s ultimate commercial success.
Experience with HBM-based AI chip architecture.
Experience proposing unconventional chip architectures in any domain, not just AI.

What We’re Looking For:

We’re looking for an XPU Architect to own the XPU compute engine architecture of the A-0 and A-1 systems. This will initially involve heavily leveraging existing 3rd party IP, but in a creative way to solve the bandwidth demand challenges and memory system interface challenges. Future generations of the compute XPU will be semi-custom and custom designs.

Ideal Background:

An ideal candidate will have:

Previous experience architecting and owning a high performance, high TDP ASIC (eg AI chips, network switch chips, high performance CPUs or similar)
Knowledge of both computer architecture but also silicon implementation, and understanding of the realistic constraints that silicon implementation places upon architectural options
Deep understanding of AI workloads, especially low latency LLM inference
Understanding of workload and system level bottlenecks, especially around inference, as it pertains to interconnect, memory capacity, bandwidth, latency, etc.

Strongly Preferred:

Hands-on experience with AI chip architecture and tapeouts
End to end ownership of at least one AI ASIC project
History of product delivery (regardless of ultimate commercial success of said product)
Experience with HBM-based AI chip architecture
Experience in proposing “weird” chip architectures (in any domain, not just AI!)

About the Company

Volantis Semiconductor

Designs photonic AI compute hardware

Volantis Semiconductor designs photonic computing hardware for AI workloads, centered on the Volantis Photonic Motherboard. Its technology directly modulates low-cost VCSELs and densely parallel optical waveguides directly on the chip to replace electrical interconnects, enabling a chip-scale package with massive bandwidth and energy efficiency. This approach differs from traditional silicon photonics by wafer-scale integration and laser-based optics, focusing on scalable interconnect bandwidth and compute efficiency rather than simply adding more silicon cores. The company aims to deliver faster, cheaper AI compute with reduced energy use, with pre-orders expected in early 2026 as it engages early customers.

Company size: 11-50
Company stage: Series A
Total funding: $97M
Headquarters: San Mateo, CA
Founded: 2022

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