Ciena

Delivers adaptive optical networking services

DSP ASIC Verification Engineer - Optical Transmission Systems

Hardware Validation & TestingConfirmed live in the last 24 hours

Full-timeLengede, GermanyNo salary listedIn-person

About the Job

Requirements

Education: Master’s degree in Electrical Engineering, Computer Engineering, Computer Science or other applicable scientific discipline
Experience: 3+ years of experience in digital design verification of complex circuits
Application of SV-UVM, SVA, and C++ in verification environments
Creation of verification plans based on functional and architectural specifications
Development of verification environments using SV-UVM and C++
Application of metric-driven verification methods including functional coverage
Utilization of EDA verification tools and flows from major vendors
Candidates should have good English communication skills, solid problem-solving capabilities, and demonstrate a high level of motivation with the ability to work independently.

Responsibilities

Design and execute verification activities for architectural functional blocks within the WaveLogic product family
Analyse architecture and functional requirement specifications and collaborate with systems engineers and architects
Develop and implement validation strategies using simulation, formal methods, and coverage techniques
Create and integrate verification environments including test benches, agents, scoreboards, and test scenarios using SystemVerilog UVM and/or C
Define and implement functional coverage models and contribute to verification planning
Perform coverage-driven verification, analyse regression results, and debug failures in collaboration with design engineers
Report verification progress, issues, and status updates on a regular basis.

Desired Qualifications

Experience with formal verification methods
Experience with coherent DSP architectures
Experience with standards and protocols such as OTN/FlexO/B100G and Ethernet (100GE+)
Experience using GIT for source code management and revision tracking
Experience using Jira for schedule planning, assignment tracking, and bug reporting
Application of programming languages such as Python, Make, Bash, C, and C++
Basic communication skills in German.

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.

Ciena’s WaveLogic family of products is a core component of optical transmission solutions, enabling high-performance telecommunications networks globally. This role contributes to the validation and quality of these products through rigorous digital verification. The position plays a critical role in ensuring reliable functionality across complex subsystems and architectural components.

How you will make an impact:

Design and execute verification activities for architectural functional blocks within the WaveLogic product family
Analyse architecture and functional requirement specifications and collaborate with systems engineers and architects
Develop and implement validation strategies using simulation, formal methods, and coverage techniques
Create and integrate verification environments including test benches, agents, scoreboards, and test scenarios using SystemVerilog UVM and/or C
Define and implement functional coverage models and contribute to verification planning
Perform coverage-driven verification, analyse regression results, and debug failures in collaboration with design engineers
Report verification progress, issues, and status updates on a regular basis.

The must haves:

Education: Master’s degree in Electrical Engineering, Computer Engineering, Computer Science or other applicable scientific discipline
Experience: 3+ years of experience in digital design verification of complex circuits
Application of SV-UVM, SVA, and C++ in verification environments
Creation of verification plans based on functional and architectural specifications
Development of verification environments using SV-UVM and C++
Application of metric-driven verification methods including functional coverage
Utilization of EDA verification tools and flows from major vendors.
Candidates should have good English communication skills, solid problem-solving capabilities, and demonstrate a high level of motivation with the ability to work independently.

Nice to haves:

Experience: Experience with formal verification methods
Experience: Experience with coherent DSP architectures
Experience: Experience with standards and protocols such as OTN/FlexO/B100G and Ethernet (100GE+)
Experience: Experience using GIT for source code management and revision tracking
Experience: Experience using Jira for schedule planning, assignment tracking, and bug reporting
Application of programming languages such as Python, Make, Bash, C, and C++
Basic communication skills in German.

#LI-MP2

At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.

Ciena is an Equal Opportunity Employer, including disability and protected veteran status.

If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

About the Company

Ciena

Delivers adaptive optical networking services

Ciena designs and delivers optical and routing systems, software, and services to build adaptive networks for telecom operators, cable operators, governments, and enterprises. Its products combine high-performance hardware with automation software to optimize traffic and manage resources in real time. The company differentiates itself with an end-to-end hardware–software–services approach and by maintaining close, collaborative relationships with customers and partners. Its goal is to help customers deploy flexible, scalable networks that enable richer, more connected experiences.

Company size: 10,001+
Company stage: IPO
Headquarters: Linthicum, Maryland
Founded: 1992

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