Capgemini

Global consulting, technology services, outsourcing

Senior Digital Designer

Silicon & ASIC DesignUpdated on Nov 14

Full-timeNo salary listedIn-person

About the Job

Requirements

At least 7 years of hands-on experience in digital design.
Strong knowledge of Verilog and/or VHDL.
Familiarity with SystemVerilog is a plus.
Experience with tools such as Cadence Genus, Synopsys Design Compiler (DC), or Fusion Compiler is a plus.
Proven experience in RTL design, microarchitecture development, and functional specifications.
Deep understanding of linting tools, clock domain crossing methodologies, and debugging flows.
Familiarity with synthesis tools and system-on-chip design is a strong plus.
A bachelor's degree in electrical engineering, electronics and communications engineering, computer engineering, computer science, or a related field is required.
Excellent communication and collaboration skills.

Responsibilities

Lead functional specification development for advanced digital systems.
Design and implement microarchitecture for high-performance blocks.
Perform RTL debugging to ensure design correctness and efficiency.
Run and analyze lint checks and clock domain crossing checks.
Collaborate with verification, physical design, and architecture teams.

Desired Qualifications

Contribute to front-end synthesis and optimization.
Experience working on system-on-chip-level integration and design.
Apply power optimization techniques for energy-efficient designs.
A master's or PhD is highly desired.

Job Description

Lead Functional Specification Development for advanced digital systems
Design and implement Microarchitecture (uArch) for high-performance blocks
Perform RTL Debugging, ensuring design correctness and efficiency
Run and analyze Lint Checks and CDC (Clock Domain Crossing) Checks
Collaborate with verification, physical design, and architecture teams
(Bonus) Contribute to Front-End Synthesis and optimization
(Nice to have) Experience working on SoC-level integration and design
(Nice to have) Apply Power Optimization Techniques for energy-efficient designs

Job Requirements

7+ years of hands-on experience in digital design
Strong knowledge of Verilog and/or VHDL
Familiarity with SystemVerilog is a plus
Experience with tools like Cadence Genus, Synopsys Design Compiler (DC), or Fusion Compiler is a plus
Proven experience in RTL design, uArch development, and functional specs
Deep understanding of linting tools, CDC methodologies, and debugging flows
Familiarity with synthesis tools and SoC design is a strong plus
Bachelor’s degree in EE, ECE, CE, CS, or a related field required
MS or PhD highly desired
Excellent communication and collaboration skills

Why You’ll Love Working With Us

Work on innovative semiconductor products with real-world impact
Join a collaborative, forward-thinking engineering team
Enjoy a flexible work environment and competitive compensation
Opportunities for technical leadership and career growth

About the Company

Capgemini

Global consulting, technology services, outsourcing

Capgemini provides consulting, technology services, and outsourcing to help organizations transform digitally. Its offerings include strategy and transformation consulting, system integration, application development, IT infrastructure management, and managed IT operations. It differentiates itself with a global presence in over 50 countries and a focus on applying AI, cloud, and cybersecurity to real business problems. Its goal is to help clients navigate digital transformation and improve efficiency and innovation through tailored, contract-based or managed services.

Company size: 10,001+
Company stage: IPO
Headquarters: Paris, France
Founded: 1967

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