Principal Engineer - Ecosystem IP Quality

About GF

GlobalFoundries (GF) is a leading manufacturer of essential semiconductors, enabling AI at scale from the cloud to the physical world. Through deep partnerships with customers, GF delivers differentiated, power efficient and high-performance solutions for high growth markets. With global manufacturing operations across the U.S., Europe and Asia, GF is a trusted and holistic technology partner for customers around the world. GF’s talented, global team remains focused every day on security, longevity, and sustainability. For more information, visit www.gf.com.

Introduction:

As part of the IP Quality team, you will play a critical role in qualifying and validating semiconductor IP libraries across various technology platforms. You will be responsible for assessing incoming vendor IP deliveries, executing IP quality assurance and managing IP testing activities, and ensuring compatibility with evolving PDK and process updates. This role requires strong collaboration with external IP providers and internal development teams to resolve technical issues, enhance IP quality, and support successful customer deployment

Your Job:

• Perform incoming IP QA against a predefined QA checklist and meeting committed cycle time. This includes verifying the IP DK and Silicon deliverables against contract. To issue certificate of approval when QA has passed & certificate of non-conformance when QA has failed
• To qualify IP merge kit to support customer tape-out
• To maintain & timely update IP information in IP database and IP Catalog
• Define comprehensive test case for IP qualification & IP regression
• Continuous improvement in QA methodology and test case suite to ensure high quality of IP to support customer engagement & tape-out.
• Assess and define IP Impact Assessment plan based on PDK update.
• Perform IP Regression (Physical verification DRC/LVS/DFM, PEX extraction and Spice simulation) against predefined passing criteria and meeting committed cycle time.
• Consolidation and review of IP Assessment results.
• Chair meeting / review with all stakeholders on impact on the IP and drive to closure
• Maintain and manage IP Regression Database
• Support scripting and automation to improve work efficiency
• Documentation of IP technical issues, waiver documents and assessment report.
• Support customer queries and resolve technical issues related to IP
• Maintain SOP workflow documentation and preparation for audit
• Responsible and accountable for complying with and implementing environmental, health, safety and security (EHSS) system, policies, procedures and guidelines that are applicable to your scope of work, thereby maintaining a healthy and safe workplace.
• Proficient in system verilog/verilog language and simulation verification experience·       Knowledge of verification methodology development for complex circuits·      
• Knowledge of DFT/scan insertion/atpg/functional test vector is a must·       Hands on experience in industry standard CAD tools  Analog Specific·      
• Experience in PHY co-sim (RTL+spice Sim) by providing Verilog test bench and helping debug in    Cadence co-sim environment for validating the third-party IP.
• Exposure in PHY digital portion using standard CMOS ASIC flow·       Knowledge in designing digital circuits for PHY protocols.
•  Knowledge in Tetramax models and ATPG coverage
• Knowledge in RF Design is a plus
• Knowledge in IC process and layout design
• Knowledge in physical verification, drc/lvs/dfm is a plus     
• Knowledge in any scripting & automation languages is a plus 

Required Qualifications:

• Bachelor / Master Degree in Electrical, Electronics Engineering or equivalent.
• Minimum 10 years of working experience in IC design field

GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard.

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