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Velaura

Designs energy-efficient AI silicon and systems

SoC Design Verification Engineer

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeSanta Clara, CA, USA$200k - $300k /yr

About the Job

Requirements

  • At least 10 years of design verification experience, including significant SoC-level experience.
  • Experience leading or participating in multiple SoC verification projects, including sign-off and tape-out.
  • Experience with SystemVerilog, UVM, C, and C++, and coverage-driven verification at system level.
  • Experience managing simulation flows on CPU-based SoCs such as ARM or RISC-V.
  • Knowledge of I/O and memory subsystem IP such as PCIe and LPDDR5 or LPDDR6.
  • Experience verifying boot sequences and root of trust.
  • Experience verifying clock and reset topology at system level, with hands-on use of CDC and RDC tools.
  • Experience with low-power verification tools and UPF-based flows.

Responsibilities

  • Drive verification planning and execution for assigned areas of the Velaura Physical AI SoC.
  • Build and maintain SoC-level simulation environments and flows for CPU-based SoCs such as ARM or RISC-V.
  • Verify boot flows, root of trust, security state transitions, and firmware handoff.
  • Verify clock and reset topology, power domains, and low-power behavior at system level.
  • Verify I/O and memory subsystem integration, including PCIe and LPDDR.
  • Run CDC and RDC analysis at SoC level and close findings with the design teams.
  • Verify system-level latency, bandwidth, and QoS under representative workloads.
  • Support SoC sign-off criteria, coverage closure, and tape-out readiness.

Desired Qualifications

  • Depth in one or more areas such as security, memory subsystem, interconnect, or power management.
  • Experience with hardware and software co-verification and pre-silicon software bring-up.
  • Experience with emulation and FPGA prototyping at SoC level.
  • Experience with one or more of ISO 26262, IEC 61508, IEC 61511, or ISO 13849.
  • Experience verifying QoS, latency-sensitive, or real-time systems.
  • Experience with post-silicon bring-up, debugging, and root cause analysis.
  • Familiarity with robotics, drones, autonomous vehicles, or industrial automation systems.
  • Experience using AI-assisted verification workflows to improve productivity and coverage.

About the Company

Velaura

Designs energy-efficient AI silicon and systems

Velaura AI designs and manufactures ultra-energy-efficient AI infrastructure, including 3nm ASIC chips, Teraflux mining systems, FluxVision fleet-management software, and AuraLinks rack-level networking. Customers deploy the hardware in data centers, while FluxVision monitors and manages fleets; EnergyTune and AutoTune dynamically adjust power to meet grid stability, and AuraLinks reduces bottlenecks in AI training and inference. The company differentiates itself with a team of silicon architects from Apple, Google, and Qualcomm, plus a patent-pending energy-management approach and a fully integrated hardware-software stack. Its goal is to enable massive AI deployment by delivering powerful, energy-efficient compute and networking that aligns with sustainable energy grids and domestically produced technology.

Company size
51-200
Company stage
Series A
Total funding
$424M
Headquarters
Santa Clara, CA
Founded
2022

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