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SiTime

Fabless MEMS timing solutions provider

Principal Analog Mixed-Signal Design Engineer

Silicon & ASIC DesignUpdated on Nov 14
Full-timeTokyo, JapanIn-person

About the Job

Requirements

  • An M.S. in Electrical Engineering or a related field with at least 12 years of related experience, or a Ph.D. in Electrical Engineering with at least 8 years of related experience.
  • An excellent academic record with published research projects prototyped and proven in silicon.
  • Detailed knowledge of CMOS circuits and noise analysis.
  • Core expertise in at least one of the following areas: Integer-N and fractional-N phase-locked loops, Sigma-Delta analog-to-digital converters, temperature sensors, analog and digital filters, quartz or MEMS oscillators, sub-threshold circuits, low-noise regulators and bandgaps, or high-speed output drivers.
  • Ability to oversee circuit layout for critical blocks.
  • Knowledge of MATLAB and VerilogA programming languages.
  • Proficiency in Cadence analog design tools.
  • Excellent written and verbal communication skills.

Responsibilities

  • Design analog and mixed-signal circuits that meet architectural requirements and technical specifications.
  • Contribute to architectural definition of the design and chip integration.
  • Perform calculations, design simulations, and verification simulations to ensure building blocks meet specifications at the schematic level and after post-layout extraction, while fully provisioning for design for test and design for manufacturability.
  • Work closely with layout engineers to validate proper layout using established best-known methods.
  • Document assigned blocks and hold preliminary and final design review meetings.
  • Participate in chip bring-up, evaluation, and characterization, with emphasis on owned blocks.
  • Work cross-functionally with Product, Characterization, Test, and Application Engineers on issues related to owned circuit blocks.
  • Support other projects as requested by management or as business needs change.

About the Company

SiTime

Fabless MEMS timing solutions provider

SiTime designs MEMS-based timing solutions (oscillators, network synchronizers, and jitter cleaners) as a fabless semiconductor company. MEMS resonators on silicon replace quartz to generate precise clocks and synchronize networks, with manufacturing handled by third-party foundries. The approach offers smaller size, lower power consumption, and better temperature stability, supported by scalable, design-focused development rather than in-house fabrication. Its goal is to expand MEMS timing adoption across automotive, industrial, IoT, mobile, aerospace, and telecom markets worldwide.

Company size
501-1,000
Company stage
IPO
Headquarters
Santa Clara, CA
Founded
2005

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