NUVACORE

Designs high-performance, general-purpose CPU cores

CPU DFT Engineer

Hardware Validation & TestingConfirmed live in the last 24 hours

Full-time$140k - $250k /yr

About the Job

Requirements

A BS or MS and 7+ years of experience in DFT or DFT verification.
Experience with scan or MBIST using industry-standard EDA tools, or experience with DFT verification flows.
For scan roles, ability to define scan insertion, scan compression, and clocking requirements, and define INTEST and EXTEST modes.
For MBIST roles, familiarity with memory repair and its interaction with functional operation.
Strong understanding of JTAG, IEEE 1500, and IEEE 1687.
Experience with Verilog RTL and gate-level netlists, including running and debugging simulations.
Strong communication skills and ability to work with cross-functional teams.

Responsibilities

Define and implement area- and power-efficient DFT architecture while collaborating with design, STA, and PD teams.
Develop scan and BIST insertion flows and implement DFT registers in design blocks.
Complete DFT architecture specifications.
Review and integrate third-party IPs into DFT architecture.
Define verification plans for DFT features.
Review DFT coverage for scan and MBIST.
Verify DFT features in RTL and gates, and run power-aware simulations.
Generate test content for silicon bringup and support silicon bringup activities, including yield analysis.

Desired Qualifications

Use DFT features to support system debug.
Leverage AI tools to accelerate DFT workflows.
Port test content and support silicon bringup on ATE platforms.
Experience in Perl, Python, or Tcl.

Salary Range: 140000 to 250000 (Currency: USD) (Pay period: per-year-salary)

At NUVACORE we're designing a new general-purpose CPU core for the sustained, intensive demands of AI infrastructure and agentic computing, not the workloads of the past. Nuvacore is building a ground-up high performance, low-power CPU for next-generation compute workloads. As DFT engineers within the CPU team you will be responsible for test related pre-silicon and post-silicon activities. We will be delivering a DFT architecture which aligns with the projects industry - leading power, performance, and area.

THE ROLE

As a CPU DFT Engineer, you will participate in the following areas:

Defining and implementing area and power efficient DFT architecture while collaborating with design, STA and PD
Develop scan and BIST insertion flows, implement DFT registers in design blocks
Completing DFT architecture specifications
Review and integrate third party IPs into DFT architecture
Define verification plans for DFT features
Review DFT coverage for scan and MBIST
Verification of DFT features in RTL and gates, and power aware simulations
Generate test content for silicon bringup, and support silicon bringup activities including yield analysis

REQUIREMENTS — MUST TO HAVE

BS or MS with 7+ years experience in DFT or DFT verification
Scan or MBIST with industry standard EDA tools, or experience with DFT verification flows
For scan role, able to define scan insertion, scan compression, and clocking requirements, and define intest and extest modes
For MBIST role, be very familiar with memory repair, and repair interaction with functional operation
Strong understanding of JTAG, IEEE 1500 and IEEE 1687
Experience with Verilog RTL and gate level netlists, including running and debugging simulations
Strong communication skills and ability to work with cross functional teams

REQUIREMENTS — NICE TO HAVE

Using DFT features to support system debug
Leveraging AI tools to accelerate DFT work flows
Porting test content and supporting silicon bringup on ATE platforms
Experience in Perl, Python, or TCL

The next great CPU won't build itself. We’re assembling a world-class team across every layer of CPU development, from architecture and design to verification, physical implementation, software, infrastructure, and product delivery. Every discipline matters, and every person has the opportunity to help shape the technology from the ground up.

About the Company

NUVACORE

Designs high-performance, general-purpose CPU cores

Nuvacore designs high-performance, general-purpose CPU cores built from the ground up to meet AI-focused workloads in data centers and advanced systems. It offers cores as either IP for chip developers or finished chips, optimized for speed and area efficiency to handle continuous, long-running tasks. The team combines veterans from Nuvia, Apple, and Arm, focusing on agentic computing rather than specialized accelerators to differentiate from competitors. The goal is to deliver scalable, reliable CPUs that provide high throughput for large-scale AI workloads and continuous computing tasks.

Company size: 51-200
Company stage: Not listed
Total funding: Not listed
Headquarters: San Jose, CA
Founded: 2026

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