M

Micron Technology

Makes memory and storage chips for AI and PCs

Staff SoC DFT Engineer - High Bandwidth Memory

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeIn-person

About the Job

Requirements

  • Strong hands-on experience with system-on-chip design-for-test architecture and implementation, including scan insertion, memory built-in self-test/logic built-in self-test concepts, boundary scan (JTAG), and automatic test pattern generation.
  • Experience working across full register-transfer-level to GDS system-on-chip flows and collaborating with synthesis, static timing analysis, and physical design teams.
  • Proficiency using industry-standard electronic design automation tools from Siemens, Synopsys, and/or Cadence for design for test and implementation.
  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
  • Seven or more years of relevant experience in system-on-chip design, design for test, or implementation for complex digital application-specific integrated circuits or system-on-chips.

Responsibilities

  • Own system-on-chip-level design-for-test structures and their implementation, including scan, memory built-in self-test, logic built-in self-test where applicable, boundary scan (JTAG), and test access architectures for HBM base-die builds.
  • Define and drive design-for-test architecture early in the design cycle, ensuring alignment with system-on-chip integration, floorplanning, timing, power, and physical design requirements.
  • Implement and integrate design-for-test logic at block, subsystem, and full-chip levels while partnering closely with register-transfer-level design and system-on-chip integration teams.
  • Complete and sign off design-for-test flows, including linting, clock-domain crossing checks, design-for-test rule checks, automatic test pattern generation readiness, and coverage closure.
  • Collaborate with physical design teams to optimize design-for-test solutions for placement, routing, timing closure, and design rule check/layout versus schematic signoff.
  • Work with verification, product engineering, test, probe, and manufacturing teams to ensure testability, diagnosability, smooth pre-silicon debug, and post-silicon bring-up.
  • Partner with computer-aided design and methodology teams to standardize and improve design-for-test flows, contribute to cross-group technical reviews, mentor engineers as appropriate, and drive innovation for future high-bandwidth memory generations.

Desired Qualifications

  • Experience with large, complex system-on-chips that integrate multiple intellectual property blocks and subsystems.
  • Strong register-transfer-level debugging and design analysis skills.
  • Experience using scripting languages such as Python, Tcl, or Perl for flow automation.
  • Familiarity with memory systems such as dynamic random-access memory and high-bandwidth memory, and related JEDEC specifications.

About the Company

Micron Technology

Makes memory and storage chips for AI and PCs

Micron Technology designs and manufactures memory and storage chips, mainly DRAM and NAND flash, used in data centers, PCs, phones, cars and industrial equipment. It is one of only three companies that make HBM, the stacked high-bandwidth memory placed beside processors in AI servers, and it is the largest memory chipmaker based in the United States. Unlike chip designers that outsource production, Micron runs its own fabs and assembly sites in the United States and across Asia. It earns money by selling chips, memory modules and solid-state drives to cloud providers, device makers and distributors. Micron was founded in 1978 and is headquartered in Boise, Idaho.

Company size
10,001+
Company stage
IPO
Headquarters
Boise, ID
Founded
1978

Recently Posted Jobs

Explore more opportunities at Micron Technology

See more jobs