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Broadcom

Designs chips and software for data centers

ASIC Physical Design Engineer

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeYishun, SingaporeNo salary listedIn-person

About the Job

Requirements

  • Minimum of 8 years of experience in a relevant field.
  • A degree, master's degree, or PhD in Electrical, Electronics, or Computer Engineering is required.
  • Ability to handle a complete RTL-to-GDS or Gates-to-GDS flow, including RTL synthesis, placement, clock tree synthesis, detailed routing, physical verification, formal verification, and timing analysis.
  • In-depth knowledge of GPU, CPU, or DSP architecture and algorithms, and related physical design implementation techniques, is advantageous.
  • Proficiency in UNIX/Linux and scripting languages is advantageous.

Responsibilities

  • Use commercial and in-house EDA tools, such as Synopsys, Cadence, and Siemens, to design and implement integrated circuits of 100–400 million gates in 7 nm, 5 nm, 3 nm, and 2 nm process technologies.

About the Company

Broadcom

Designs chips and software for data centers

Broadcom designs chips and sells infrastructure software for the companies that run large data centers, telecom networks and corporate IT. Its custom AI processors, built with cloud companies, and its Ethernet switch chips move and process data inside the computer clusters that train AI models. The chip business also makes parts for broadband, wireless, storage and industrial equipment, sold to device makers and cloud operators, while VMware software lets businesses run private clouds and is sold by subscription. Broadcom took its current form in 2016, when Avago Technologies, formed in 2005 from Agilent's chip unit, bought Broadcom Corporation, and it is based in Palo Alto, California.

Company size
10,001+
Company stage
IPO
Headquarters
Palo Alto, CA
Founded
2005

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