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Mirafra Technology

Turnkey ASIC design and semiconductor engineering

Physical Design Engineer

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeSan Diego, CA, USANo salary listedIn-person

About the Job

Requirements

  • Able to handle top-level MSM complexity across floor planning, placement, clock tree synthesis, routing, and timing closure.
  • Able to take a hard macro through physical implementation from netlist to GDS, including timing closure, formal verification, and physical verification.
  • Experience with EDA physical design tools such as Cadence Innovus, Synopsys ICC2, PrimeTime SI, or Calibre.
  • Physical design implementation expertise in recent technology nodes in one or more of the listed domains.
  • Experience with full-chip-, macro-, or block-level floor planning, including macro placement, power-grid implementation, power routing, and special routing such as analog signals.
  • Knowledge of power-collapse and low-power implementation flows.
  • Experience with chip- or block-level place and route, placement, timing closure in P&R mode, clock tree synthesis, and routing.
  • Experience performing static timing analysis using PrimeTime SI, Tempus, or another industry-standard STA engine, including timing closure, ECO generation, and timing correlation.
  • Deep understanding of timing correlation, timing fixes, and corner and voltage definitions.
  • Experience implementing custom or regular clock trees at block or top level, balancing complex trees, and applying clock-power reduction techniques.
  • Knowledge of power-collapse and power-gating implementation techniques and UPF/CPF flows.
  • Knowledge of CLP/FV.
  • Experience using Calibre for physical verification, including running DRC, LVS, ERC, and soft-checks and understanding associated rules and fixes.

Responsibilities

  • Work on Adreno graphics cores in physical implementation.
  • Run place-and-route experiments to validate new flows and methodologies.

Desired Qualifications

  • Perl, Python, or shell scripting experience for automation.

About the Company

Mirafra Technology

Turnkey ASIC design and semiconductor engineering

Mirafra Technologies delivers end-to-end turnkey ASIC design and semiconductor engineering services to help global tech companies move from concept to silicon to system. It covers the full lifecycle: architecture, design, verification, physical implementation, package/board design, embedded software, post-silicon validation, test and product engineering, and system solutions. With 2,200+ engineers and delivery centers worldwide, Mirafra has completed 650+ tape-outs for over 50 semiconductor customers, from startups to established firms. Its edge comes from a one-stop engineering partner model that combines deep domain expertise with scalable AI, cloud, data engineering, and software capabilities to speed time-to-market and reduce engineering complexity.

Company size
1,001-5,000
Company stage
Not listed
Total funding
Not listed
Headquarters
Bengaluru, India
Founded
2004

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