Analog Transceiver Design Engineer
Black Semiconductor
Analog Transceiver Design Engineer
Black Semiconductor
Graphene photonics enable optical chip interconnects
About us
We see the semiconductor industry as a realm of possibility. We see opportunity. We see the profound impact that our graphene solutions will have in transforming the industry. We invite you to join us in driving change with our fundamentally human-centered approach, uniting bright minds around a shared vision. The vision is: Prove to everybody that you can make a fundamental change. Prove with your knowledge and skills how things can be done differently. Together, we can change the paradigm of how the world connects
About our technology
The semiconductor industry’s growing demand for more powerful chips with higher bandwidth and lower power finds its solution in our technology. We connect chips to high-throughput, low-delay computing networks. The key lies in harnessing the physical properties of graphene to combine electronic computing with photonic communication, allowing countless chips to interact almost as if they were one. Our graphene photonic innovation increases computing power and efficiency to a new order of magnitude
In short, we connect chips to create powerful and energy-efficient networks, overcoming connectivity limitations in the semiconductor industry. We deliver the graphene solution
The Role
We are seeking a skilled Analog Transceiver Design Engineer at Black Semiconductor to design, simulate, and validate high-speed analog transmitter and receiver circuits that support our next-generation Optical Compute Interconnect (OCI) products. You will develop power-efficient analog front ends that interface with integrated photonic devices, working closely with the Analog Systems Architect, photonics, packaging, and digital teams from concept through silicon validation.
To join our team, you should be excited to
Design and simulate high-speed analog building blocks including transmit drivers, TIAs, limiting amplifiers, CTLEs, bias circuits, and other transmitter and receiver functions.
Perform AC, transient, noise, jitter, linearity, PVT, Monte Carlo, and post-layout simulations to optimize circuit performance.
Collaborate with photonics and packaging engineers to co-design electrical interfaces while accounting for device and interconnect parasitics.
Support silicon bring-up, laboratory characterization, debugging, and correlation between simulation results and measured silicon.
Work with system architects and senior designers to implement analog IP meeting OCI Generation 1 and Generation 2 performance targets.
Your Qualifications
Bachelor's, Master's, or Ph.D. in Electrical Engineering or a related discipline with 4–5 years of industry experience in analog IC design (or equivalent demonstrated impact).
Strong understanding of CMOS analog circuit design fundamentals, including gain, bandwidth, noise, linearity, feedback, stability, high-speed signal integrity, device parasitics, and analog circuit optimization.
Experience designing high-speed analog blocks such as transmit drivers, TIAs, CTLEs, limiting amplifiers, or SerDes front ends.
Experience with analog simulation and verification methodologies, including AC, transient, noise, jitter, linearity, PVT, Monte Carlo, and post-layout simulations.
Strong simulation, debugging, and data-analysis skills, with the ability to interpret simulation results and silicon characterization data.
Experience with analog IC design, simulation, verification, and laboratory characterization tools, including Cadence Virtuoso/Spectre, MATLAB and/or Python for analysis and automation, RF/high-frequency tools such as Keysight ADS, Ansys HFSS or equivalent EM simulation tools, post-layout extraction and verification tools, and high-speed laboratory equipment including oscilloscopes, VNAs, BER testers, and data-analysis workflows.
Excellent communication skills, with the ability to collaborate effectively across analog, photonics, packaging, layout, and system teams.
Experience working on high-speed optical transceivers, integrated photonic systems, or advanced SerDes designs will be considered a plus.
Experience supporting silicon bring-up, laboratory characterization, and debugging of prototype or production silicon will be considered a plus.
Our work culture
People Over Processes. At Black Semiconductor, flexibility is key—we ensure work adapts to life, not the other way around. We champion work-life harmony, where careers are meaningful and enriching. Our processes are human-centric, allowing you to focus on what matters
Let’s grow together. Your potential is our priority. We provide the autonomy to make a lasting impact and nurture your growth through a culture of continuous learning. We invest in your journey for professional and personal development
Your Health and Future Matter. Your well-being is paramount. We offer a comprehensive benefits package with outstanding insurance, pension and virtual stock options for your mental, physical, and financial health. Your peace of mind is our priority - in the present and future
We Live Openness. Collaboration and inclusivity are the cornerstones of our culture. We practice openness, fostering trust and respect. Individuality is our collective strength, fueling innovation and driving us forward
We connect chips – and people. We encourage qualified individuals from any background to apply. We foster an inclusive and supportive work environment that values collaboration, innovation, and growth. Join our team and be part of an organization dedicated to making a difference in the industry
If your application results in an employment relationship, your Applicant Data will be transferred to our personnel records and processed in accordance with applicable legal requirements; otherwise, your Applicant Data will be retained for up to six (6) months after completion of the recruitment process. Read more about our privacy policy here.
Graphene photonics enable optical chip interconnects
Black Semiconductor develops graphene-based photonics that integrate optical components into the outer layers of CMOS-like chips, enabling direct optical chip-to-chip communication. It works by using graphene as a translator to convert electronic signals to optical signals and back, so electrons on silicon can talk to photons through integrated photonic interconnects. This approach differs from traditional silicon photonics or pure electronic interconnects by being CMOS-compatible, wafer-scale, and capable of linking multiple chips as a single high-performance unit while reducing production steps by about 60%. The company aims to move from pilot production to mass manufacturing, building a 300mm wafer facility (FabONE) in Aachen, with pilot production by 2027 and mass production by 2031, backed by a large European funding round and investors.
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