Principal Server CPU Validation Engineer

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THE ROLE
We are seeking a Principal Server CPU Validation Architect to provide technical leadership for post-silicon validation of next-generation server CPU products. This role will define validation strategies, lead complex system-level debug, and work across hardware, firmware, BIOS, operating system, and platform teams to identify and resolve challenging silicon and system issues.

THE PERSON
The ideal candidate is a highly experienced server CPU validation engineer with deep knowledge of x86 architecture, post-silicon validation, system-level debug, firmware and server platforms. You are comfortable working hands-on with complex hardware and software issues while providing technical direction to engineers and collaborating across multiple engineering disciplines.

KEY RESPONSIBILITIES

• Define and drive post-silicon validation strategies for server CPU technologies and platforms.
• Lead complex system-level debug involving silicon, firmware, BIOS, operating systems, and platform interactions.
• Develop validation methodologies, test strategies, and coverage plans for new CPU features.
• Analyze silicon failures and drive issues to root cause in partnership with design, verification, firmware, and platform teams.
• Provide technical leadership and architectural guidance to validation engineers.
• Identify validation gaps and develop solutions that improve coverage, efficiency, and product quality.
• Drive automation and validation infrastructure improvements where appropriate.
• Collaborate across engineering organizations to resolve complex cross-functional technical issues.
• Communicate technical findings, risks, and recommendations clearly to engineering leaders and stakeholders.
• Mentor engineers and help establish strong validation and debug practices across the team.

PREFERRED EXPERIENCE

• Extensive experience in CPU, SoC, or server post-silicon validation.
• Strong understanding of x86/server architecture and system-level interactions.
• Deep experience debugging complex hardware, firmware, BIOS, OS, and silicon issues.
• Experience developing post-silicon validation strategies and methodologies.
• Strong Linux and low-level system debugging experience.
• Experience with server technologies such as PCIe, memory, power management, RAS, virtualization, or high-speed I/O.
• Programming/scripting experience with languages such as C/C++, Python, or similar.
• Demonstrated technical leadership across multidisciplinary engineering teams.

EDUCATION

Bachelor’s degree in Electrical Engineering or Computer Engineering or Computer Science required; Master’s degree preferred.

LOCATION

Austin, TX

Santa Clara, CA

Folsom, CA

This role is not eligible for visa sponsorship.

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.