Rack-Scale AI Hardware Architect
No salary listed
Senior
Bachelor's, Master's, PhD
Palo Alto, CA, USA+1 moreMore locations: Austin, TX, USA
HybridHybrid work is indicated for the Austin location.
Hardware EngineeringHardware Systems Integration
About the job
Requirements
- A minimum Bachelor's degree in Electrical Engineering, Mechanical Engineering, Computer Engineering, or a related field, with relevant experience in server, datacenter, high-performance computing, or artificial intelligence system design.
- Demonstrated architecture and design ownership of dense, rack-based server systems taken to production, including authoring specifications for original design manufacturer and original equipment manufacturer partners.
- Expert command of copper and optical interconnect, including Peripheral Component Interconnect Express, high-speed Ethernet and SerDes, direct-attach copper and twinax, backplane and cabled channels, active optical cables, and pluggable or co-packaged optics, with signal-integrity judgment about where each approach stops working.
- Expert command of removing heat from racks, cooling architecture, cold plates, manifolds, coolant distribution units, flow and thermal budgeting, and the facility-side interface.
- Ability to reason across interconnect, power, thermal, mechanical, and software boundaries, including working directly with software on model partitioning, with a track record of modeling and trade studies driving architectural decisions.
Responsibilities
- Own the rack-level reference architecture, including board, chassis, backplane, rack topology, mechanical envelope, physical constraints, and serviceability, from pathfinding through a working reference implementation.
- Lead scale-up and scale-out interconnect architecture, including Peripheral Component Interconnect Express hierarchy and switching, high-speed Ethernet and SerDes, die-to-die and board-level links, copper versus optical links at each tier, retimers, connectors and cable plant, topology, oversubscription, and bandwidth and latency budgets for each hop.
- Develop thermal architecture for high-density racks, including direct-to-chip and cold-plate cooling versus immersion, coolant distribution units and manifolds, flow and pressure budgets, component thermal limits, and the rack-to-facility interface.
- Develop power delivery architecture, including rack distribution and busbar design, high-voltage direct current and 48-volt-class conversion and efficiency, transient behavior across large device counts, redundancy, telemetry, and reliability, availability, and serviceability.
- Model the full large language model solution jointly with the software team, translating partitioning strategy, inter-layer traffic, and collectives into fabric, memory, and topology requirements, supported by quantitative rack- and cluster-level performance, power, thermal, and cost models.
- Produce a buildable rack reference implementation that meets performance, power, and thermal targets in hardware.
- Establish a coherent partitioning and fabric design that enables software to map frontier-scale models across the system and carries the resulting traffic without over-provisioning or starvation.
- Validate thermal and power architectures with measured data, maintain headroom for the next device generation, and align them with a system model trusted for subsequent decisions.
- Enable customers and partners to deploy the design in real facilities against documented power, cooling, weight, and service requirements.
- Align hardware, mechanical, and software teams around one architecture.
Desired Qualifications
- A Master's degree or PhD in Electrical Engineering, Mechanical Engineering, Computer Engineering, or a related field.
- Hyperscale or Open Compute Project experience, including Open Rack Version 3 and contributions to relevant standards bodies.
- Experience with systems built from many small accelerators, dataflow, or wafer-scale architectures rather than only graphics processing unit tray designs.
- Experience with large language model training or inference at scale and how parallelism strategies stress a fabric, plus familiarity with chiplets, die-to-die interfaces, and advanced packaging.
- Experience carrying a reference design through original design manufacturer or contract manufacturer partners into production and customer datacenters, including electromagnetic compatibility, structural, and shock and vibration qualification.
About the company
Mythic designs power-efficient AI hardware for edge deployments. Its main products are the M1076 Analog Matrix Processor, a single-chip accelerator that can run at up to 25 TOPS, and the MP10304 Quad AMP PCIe card, which adds more performance for AI inference on edge devices and servers. The hardware uses analog matrix processing to perform AI computations with low energy usage, enabling high-performance inference in real-world environments without relying on cloud servers. Mythic targets customers that need strong AI performance with tight power budgets, such as tech companies and other businesses with heavy data-processing needs. Compared with typical AI accelerators, Mythic emphasizes analog computation and edge efficiency, offering a compact single-chip solution plus an expansion PCIe card to scale performance. The company's goal is to make high-performance AI inference practical at the edge by delivering power-efficient processors and modules for edge devices and servers.
Company Size
51-200
Company Stage
Late Stage VC
Total Funding
$290.4M
Headquarters
Austin, Texas
Founded
2012
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Simplify's Take
What believers are saying
- Mythic closed a $125 million round on December 17, 2025, led by DCVC.
- Mythic acquired Videantis on May 19, 2026, expanding automotive and data-center reach.
- Mythic opened Bengaluru on September 28, 2026, and plans to quadruple India headcount by 2027.
What critics are saying
- Mythic’s 2025 revenue was only $6.4 million against $125 million raised.
- Revelio reported 152 employees in March 2026, yet scale remains tiny for chip wars.
- Delayed automotive SoCs until the late 2020s expose Mythic to execution failure and obsolescence.
What makes Mythic unique
- Mythic combines analog compute-in-memory with Videantis’ production-proven digital processor stack.
- Honda and Mythic announced joint development on February 6, 2026 for automotive-grade AI SoCs.
- Mythic’s APUs target 120 TOPS per watt, positioning them against GPU-heavy inference.
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Benefits
- Every day is casual Friday!
- Commuter: Caltrain & MetroRail passes. Scooter, Bike, Public Transit and Parking Stipend
- Dog-Friendly in Austin office
- $500 annual education benefit for conferences, classes or purchase of books
- HSA/FSA: Mythic contributes $750 for single and $2000 for family per year if you enroll in high deductible plan
- We pay 100% of employee premiums and 70% of dependent premiums
- Flexible PTO and WFH
- $150 quarterly wellness benefit