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FuriosaAI

Power-efficient AI inference accelerator chips

Firmware Engineer - BIST FW Development

Systems Software EngineeringConfirmed live in the last 24 hours
Full-timeSeoul, South KoreaNo salary listedIn-person

About the Job

Requirements

  • At least 10 years of practical experience in embedded firmware or Linux kernel development, or equivalent capability.
  • Understand Arm-based system-on-chip boot flows, including Trusted Firmware, U-Boot, Linux, and bare-metal programming.
  • Have experience developing Linux device drivers and be able to work with PCIe, DMA, and interrupts.
  • Understand power rails, PMBus, I2C, and reset signals from chip specifications, register maps, and board schematics, and be able to control and debug hardware.
  • Be able to develop in at least two languages, including C, Rust, or Python.
  • Be able to design and develop the structure of a validation system including firmware, drivers, and tools, and independently determine development direction.
  • Analyze firmware and hardware issues using reproducible conditions and measurement results, and resolve them with relevant development organizations.

Responsibilities

  • Define defects to detect, operating margins, and required measurement data with quality, hardware, and firmware teams; combine compute loads, memory access, inter-chip transfers, and host-to-chip transfers in single-chip and multi-chip environments; and develop ways to control workload location, intensity, and patterns according to validation goals rather than relying only on model behavior.
  • Analyze and modify NPU core firmware and executable programs to implement desired compute and data-movement patterns; provide status, error, and measurement information for repeated execution and automated judgment; and enable diagnosis of the conditions and stages where failures occur.
  • Run validation code on actual products and test equipment to evaluate defect-detection effectiveness, reproducibility, and stability.
  • Analyze, modify, build, and deploy the SoC bootloader, embedded Linux, and host Linux device drivers needed for validation.
  • Use register and board-circuit information to control voltage, clocks, sensors, and resets; investigate PCIe, DMA, and interrupt behavior; and trace firmware and hardware-boundary issues using debugging tools such as JTAG and UART.
  • Develop data-collection functions with margin-analysis colleagues for low-voltage, high-temperature, and power-transient conditions; control power, clocks, and workload conditions; and implement readout and control of on-chip monitors and sensors.
  • Review judgment criteria and screening conditions with relevant colleagues and assess validation methods that reduce both unnecessary rejection of good products and missed detection of vulnerable products.
  • Provide interfaces and tools that allow validation firmware, drivers, and workloads to run in shared test frameworks and production environments.
  • Document deployment methods, execution conditions, supported versions, and constraints, and analyze issues found in hardware testing, software evaluation, and production settings.

Desired Qualifications

  • Experience developing firmware, runtime, or instruction-level software for AI accelerators such as NPUs or GPUs.
  • Experience developing chip-validation, BIST, ATE, or SLT programs.
  • Understanding of and experience controlling power and clock technologies such as PMIC, PMBus, I2C, DVFS, and transient voltage drops.
  • Experience using multi-device interconnect technologies such as PCIe P2P, PCIe switches, and IOMMU.
  • Experience reading and controlling on-chip monitors and PVT sensors and measuring operating margins.
  • Understanding of Secure Boot, OP-TEE, BMC/IPMI, or server thermal management.
  • Experience using AI tools for code and specification analysis and debugging, and developing and deploying Rust-based single-binary tools.

About the Company

FuriosaAI

Power-efficient AI inference accelerator chips

FuriosaAI develops AI accelerators for data centers. Its flagship RNGD chip is a power-efficient accelerator designed to boost performance per watt for running large language models and other demanding AI workloads. The hardware is configurable with multiple processing elements to fit different workloads, and it is paired with advanced compiler technology and profiling tools to identify bottlenecks and optimize efficiency. This combination of flexible hardware and software optimization differentiates FuriosaAI from competitors, focusing on maximizing performance while keeping energy use low. The company targets data centers and enterprises that need high-performance, energy-efficient AI solutions, and aims to make AI computing more sustainable and scalable by selling its chips and related software tools and pursuing long-term contracts with large-scale customers.

Company size
201-500
Company stage
Series D
Total funding
$880.8M
Headquarters
Seoul, South Korea
Founded
2017

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