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DiffLogic

FPGA Engineer

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeSanta Clara, CA, USANo salary listedIn-person

About the Job

Requirements

  • Extensive experience in low-latency applications and video intellectual property.
  • Candidates with ASIC tape-out experience should indicate it and apply to the ASIC / Physical Design Engineer role.

Responsibilities

  • Develop FPGA solutions for low-latency applications and video intellectual property.
  • Work hands-on on novel problems without established solutions.
  • Iterate quickly and support frequent tape-outs, with each silicon spin improving on the previous one.

About the Company

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