Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

Overview: Our team developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best compute platform possible.

What you might work on: This posting spans multiple roles within the RISC-V team. One application, one recruiter screen - then we match you to the specific team and location that fits best. What each sub-team does:

RTL Design: Implement and debug CPU-block RTL and contribute to microarchitecture and RTL infrastructure. Final years of bachelors or later
Implementation Engineer: Translate CPU microarchitecture into a synthesizable, performant design. Work with the RTL team to drive performance, power and area improvements.
Design Verification: Verify high-performance, out-of-order RISC-V CPUs across ISA and microarchitecture features.
Formal Verification: Develop assertions and formal-analysis flows to identify corner-case hardware issues. Austin-only role.
Core Performance Verification: Validate CPU performance through workload bring-up, simulation, emulation, and bottleneck analysis.
Design Verification Software & Infrastructure: Build scalable software, automation, CI/CD, and test infrastructure for CPU verification.
Platform Software: Develop low-level software, firmware, testing, and automation for high-performance RISC-V CPUs.

This role isonsite, based out of Austin, TX or Boston, MA or Fort Collins, CO or Santa Clara, CA.

Who You Are

Currently pursuing a BS, MS, or PhD in EE, ECE, CS, CE or related field
Strong academic performance with hands-on related coursework, project or work experience.
Interest in RISC-V, CPU architecture, AI/ML hardware, verification, performance, or low-level software.
Strong debugging, analytical, communication, and collaboration skills.
Ability to learn new tools and work in an on-site engineering environment
Interest or exposure with AI tools to accelerate development and workflows.

What We Need

Strong foundational exposure to one or more of the following key areas:
HDLs (such as SystemVerilog), computer architecture, or RTL design and debugging concepts.
Programming or scripting skills in Assembly, C/C++, Python, or Perl.
Design verification, formal analysis, simulation, testbenches, or coverage analysis.
CPU microarchitecture, out-of-order pipelines, memory systems, or performance modeling.
Familiarity with Linux, Git, CI/CD pipelines, firmware, or low-level system software.

What You Will Learn

Hands-on experience with modern, out-of-order RISC-V CPU microarchitecture design and implementation.
Advanced design verification methodologies, including formal analysis, simulation, and testbench development.
Low-level platform software, firmware, and system-level initialization for high-performance processors.
Performance analysis, bottleneck identification, and optimization techniques on custom silicon environments.

USA Hiring Timelines

This internship opportunity is available throughout our 3 terms with the following corresponding recruitment cycles:

Winter Term: Jan–Apr work term, Sept–Dec recruit.
Summer Term: May–Aug work term, Oct–Apr recruit.
Fall Term: Sept–Dec work term, Jan–Aug recruit.

Please note these timelines are for reference only. Actual timelines may vary.

Compensation for all interns at Tenstorrent ranges from $50/hr - $70/hr including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

About the company

Tenstorrent designs AI processors and computing systems for developers, enterprises and chip designers that want control over their hardware. Its Galaxy servers connect multiple AI processors to run language models, video generation and other workloads across larger systems. The company sells accelerator cards, workstations and servers, and licenses RISC-V CPU designs and Tensix AI cores for customers to incorporate into their own chips. Its software compilers translate models from popular machine learning frameworks into programs for Tenstorrent hardware. Founded in 2016, it operates from offices in the United States, Canada, Europe and Asia.

Company Size

501-1,000

Company Stage

Late Stage VC

Total Funding

$2.8B

Headquarters

Santa Clara, California

Founded

2016

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Simplify's Take

What believers are saying

Chip licensing reaches established manufacturers: Samsung and LG license Tenstorrent CPU and AI cores.
Research deployment extends beyond chatbots: September 2026 JapanFold launched drug discovery models using Tenstorrent Galaxy servers.
Toronto debug engineers learn across layers: Tenstorrent advertises experience spanning silicon, boards, firmware, drivers and system software.

What critics are saying

Model compatibility needs checking: experimental TT-Forge lacks some operators and support for changing tensor dimensions.
Remote flexibility is limited for Toronto debug engineers: Tenstorrent specifies hybrid attendance and hands-on lab work.
Hardware rollout includes delivery waits: Blackhole cards list two weeks to ship plus two to five weeks of transit.

What makes Tenstorrent unique

Memory uses standard graphics components: Tenstorrent Blackhole cards carry up to 32GB of GDDR6.
Outsiders shape the stack: Tenstorrent rewards merged compiler, firmware and kernel contributions through its discretionary bounty program.
Architecture leadership has shipped mainstream chips: CEO Jim Keller led designs behind AMD Zen and Apple A4/A5 processors.

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Seeking Alpha

Oct 19th, 2026

Tensorrent raises $1.5B Series E at $6.2B valuation

Artificial intelligence chip startup Tensorrent has raised a $1.5B Series E round at a $6.2B valuation, it announced on Monday. The round was led by Trace Capital and Innovation X, and included new investors.

BetaKit

Oct 19th, 2026

Tenstorrent secures $1.5 billion USD at $6.2-billion valuation to challenge GPU dominance.

Tenstorrent secures $1.5 billion USD at $6.2-billion valuation to challenge GPU dominance. Canadian-founded chipmaker is betting that the future of AI inference is open-source. Canadian-founded, United States (US)-based AI infrastructure company Tenstorrent announced today that it has closed $1.5 billion USD ($2.1 billion CAD) in Series E funding to fuel its global expansion plans. The equity round, which was led by new US investors Trace Capital and Innovation X, gives Tenstorrent a post-money valuation of $6.2 billion USD (almost $8.8 billion CAD), more than twice the $2.6 billion USD mark that Tenstorrent was valued at when the company closed its nearly $700-million USD Series D in late 2024. Since then, Tenstorrent has begun shipping its Galaxy servers commercially. "The future of compute is open, scalable, and owned by the people building on it." Jim Keller, Tenstorrent Tenstorrent plans to use this capital to fund volume manufacturing of those Galaxy servers, the development of next-generation hardware and intellectual property (IP), and hiring, as it looks to compete with Nvidia and other established AI chipmakers and challenge traditional graphics processing unit (GPU) dominance in AI with an open-source approach it claims is cheaper, more scalable, and easier to customize. "We built one architecture and sell it at every size," Tenstorrent CEO Jim Keller said in a statement. "The future of compute is open, scalable, and owned by the people building on it." A Tenstorrent spokesperson told BetaKit over email that Canadian investors also participated in the round, but declined to share specific names. Tenstorrent's existing Canadian backers include Export Development Canada, Georgian, the Healthcare of Ontario Pension Plan, and Real Ventures. The Tenstorrent spokesperson also declined to share any more details regarding the structure of its Series E, including whether it involved any secondary capital, or disclose Tenstorrent's total funding to date. Founded in 2016 in Toronto by former AMD employees Ljubisa Bajic (who went on to build Taalas, which AMD recently agreed to acquire), Ivan Hamer, and Milos Trajkovic, Tenstorrent is developing what the company describes as "a general-purpose AI platform" for running large language models, video models, and image models. The firm builds and sells AI compute "at every level," from single cards and workstations to racks and superclusters, providing the hardware necessary for AI training and inference. Tenstorrent's customers include chip designers, sovereign infrastructure providers, and inference platforms. The company also licenses its AI and RISC-V IP to clients who want to own and customize their silicon, including LG and Samsung. Tenstorrent is betting that the future of AI inference is open-source, and views its software as a differentiator compared to competitors. "We built a scalable, open-source software stack because we believe customers want flexibility and control," the Tenstorrent spokesperson said, adding that, "AI models keep changing, so hardware has to run whatever comes next." Tenstorrent's clients and partners include FinTech firm Virtu Financial, data centre provider Equinix, and AI companies like ai& and Smallest.ai. Keller, a renowned chip designer who also previously worked at AMD as well as Apple, Intel, and Tesla, took over for Bajic as Tenstorrent CEO in 2021. Tenstorrent quietly relocated from Canada to the US in 2023, moving its headquarters from Toronto to Santa Clara, California, to raise more money from American investors and prepare for an eventual initial public offering (IPO) on the Nasdaq or New York Stock Exchange. Despite this, Tenstorrent has retained a strong presence in Canada; Toronto remains its largest office, housing 200 of its 1,000 employees. The company also still makes a number of its parts at Vexos Canada's Markham site. This summer, The Information and Bloomberg reported that Tenstorrent has drawn takeover interest from larger US chipmakers Intel (Keller's previous employer) and Qualcomm. While Keller told EE Times that he has met with the CEOs of both firms to pitch them on Tenstorrent's hardware IP, he said an IPO remained the company's target at that time. The Tenstorrent spokesperson declined to comment on those reports, the status of those discussions, or the company's IPO ambitions. Last year, Tenstorrent made an acquisition of its own, snapping up Blue Cheetah Analog Design to bolster its in-house chip design capabilities, reportedly explored another fundraise, and shed 7.5 percent of its workforce amid a shift from enterprise to developer sales. Feature image courtesy Tenstorrent. CIBC Innovation banking. Two exited founders and an AI-focused VC reveal how AI is changing the calculus of funding a business.

MarketScreener

Oct 19th, 2026

AI chip startup Tenstorrent more than doubles its valuation to $6.2 billion in funding round.

AI chip startup Tenstorrent more than doubles its valuation to $6.2 billion in funding round. Published on 10/19/2026 at 07:44 am EDT - Modified on 10/19/2026 at 07:45 am EDT Oct 19 (Reuters) - Tenstorrent said on Monday it raised $1.5 billion in a late-stage funding round that valued the AI chip startup at $6.2 billion post-money, more than doubling its valuation from December 2024. Here are some more details: o The Santa Clara, California-based company said it would use the funding to scale production of its Galaxy servers, which combine dozens of its AI chips to power applications including chatbots, coding assistants and video generators. o Tenstorrent develops AI chips and software using RISC-V, an open-source chip architecture that enables companies to design processors without license fees and reduce dependence on proprietary chip ecosystems such as Arm's o The Series E round was led by Trace Capital and Innovation X. Other backers included Cathie Wood's ARK Invest, Sandisk, Morgan Stanley, T. Rowe Price and Tether Investments. o Tenstorrent CEO Jim Keller, a prominent chip architect, previously led Tesla's efforts to develop a self-driving chip for electric vehicles and held key design roles at Apple and AMD among others. o The startup's last funding round raised more than $693 million in December 2024 at a $2 billion pre-money valuation, with Samsung Securities and AFW Partners leading the financing. (Reporting by Anhata Rooprai in Bengaluru and Max A. Cherney in San Francisco; Editing by Tasim Zahid) (C) Reuters - 2026

CxOToday

Oct 8th, 2026

Vayavya Labs and Tenstorrent partner to accelerate RISC-V hardware and software development through virtual platform modeling.

Vayavya Labs and Tenstorrent partner to accelerate RISC-V hardware and software development through virtual platform modeling. Vayavya Labs and Tenstorrent are delivering SystemC virtual platforms for Tenstorrent's security and system management IP using the TvastaaVP platform. Vayavya Labs announced its role as a virtual platform partner to Tenstorrent, an AI compute company building RISC-V-based processors and systems. Since 2024, Vayavya Labs has built and delivered SystemC/TLM virtual platforms modeling subsystems of Tenstorrent's IP portfolio, including security enclave processor (SEP) register complexes, system management controller (SMC) logic, direct memory access (DMA) engines with secure zeroing, boot and fuse infrastructure, and a hardware security module supporting cryptographic operations. These models allow Tenstorrent's software and validation teams to develop, test, and debug against a virtual representation of the hardware well before physical silicon is ready, helping identify integration issues earlier in the development cycle. Vayavya Labs built the models on CSML, its SystemC modeling library, providing Tenstorrent with an open, Accellera-compatible modelling path and a commercial variant tuned for its simulation environment. Vayavya Labs used TvastaaVP to accelerate development while maintaining quality controls. Most recently, Vayavya Labs delivered a phased release of Tenstorrent's Open Chiplet Harness SEP virtual platform on two independent simulation targets and extended the platform with an additional system management controller and harness capabilities. "Getting software and validation teams working against accurate models before silicon is available provides a meaningful advantage in this industry and a faster time to market. "It's one of the primary reasons we've continued to deepen our work with Vayavya Labs," said Aniket Saha, VP of Product Strategy, Tenstorrent. "Tenstorrent is exactly the kind of production environment where agentic AI for virtual prototyping has to deliver production IP, demanding schedules, and high-quality bars," said Sandeep Pendharkar, CTO & VP Engineering, Vayavya Labs. "What started as a single SystemC modeling engagement has grown into a multi-year partnership precisely because the models hold up under that pressure. As Tenstorrent's RISC-V roadmap continues to expand, we see this as just the beginning of what virtual platforms can do for development velocity." Vayavya Labs and Tenstorrent will discuss this collaboration further at The Open Frontier, Tenstorrent's RISC-V ecosystem event in Bengaluru on October 8, 2026, where Sandeep Pendharkar, CTO & VP Engineering at Vayavya Labs, will join the panel "Latest in RISC-V Products & Startups," moderated by Tenstorrent's Divyang Agrawal, VP of RISC-V Cores/IP.

PR Newswire

Oct 7th, 2026

Vayavya Labs and Tenstorrent partner to accelerate RISC-V hardware and software development through virtual platform modeling.

Vayavya Labs and Tenstorrent partner to accelerate RISC-V hardware and software development through virtual platform modeling. Vayavya Labs Oct 07, 2026, 08:30 ET Vayavya Labs and Tenstorrent are partnering to build SystemC virtual platforms that enable earlier software development and validation for Tenstorrent's RISC-V hardware, reducing integration risks and time to market. BELAGAVI, India and SANTA CLARA, Calif., Oct. 7, 2026 /PRNewswire-PRWeb/ - Vayavya Labs and Tenstorrent are delivering SystemC virtual platforms for Tenstorrent's security and system management IP using the TvastaaVP platform. Vayavya Labs, a Silicon-to-Systems technology solutions company specializing in hardware-software interface tools, ECU virtualization, and SystemC-based virtual prototyping, announced its role as a virtual platform partner to Tenstorrent, an AI compute company building RISC-V-based processors and systems. Since 2024, Vayavya Labs has built and delivered SystemC/TLM virtual platforms modeling subsystems of Tenstorrent's IP portfolio, including security enclave processor (SEP) register complexes, system management controller (SMC) logic, direct memory access (DMA) engines with secure zeroing, boot and fuse infrastructure, and a hardware security module supporting cryptographic operations. These models allow Tenstorrent's software and validation teams to develop, test, and debug against a virtual representation of the hardware well before physical silicon is ready, helping identify integration issues earlier in the development cycle. Vayavya Labs built the models on CSML, its SystemC modeling library, providing Tenstorrent with an open, Accellera-compatible modelling path and a commercial variant tuned for its simulation environment. Vayavya Labs used TvastaaVP to accelerate development while maintaining quality controls. Most recently, Vayavya Labs delivered a phased release of Tenstorrent's Open Chiplet Harness SEP virtual platform on two independent simulation targets and extended the platform with additional system management controller and harness capabilities. "Getting software and validation teams working against accurate models before silicon is available provides a meaningful advantage in this industry, and a faster time to market. It's one of the primary reasons we've continued to deepen our work with Vayavya Labs," said **Aniket Saha, VP of Product Strategy, Tenstorrent**. "Tenstorrent is exactly the kind of production environment where agentic AI for virtual prototyping has to deliver - production IP, demanding schedules, and high quality bars," said Sandeep Pendharkar, CTO & VP Engineering, Vayavya Labs. "What started as a single SystemC modeling engagement has grown into a multi-year partnership precisely because the models hold up under that pressure. As Tenstorrent's RISC-V roadmap continues to expand, we see this as just the beginning of what virtual platforms can do for development velocity." Vayavya Labs and Tenstorrent will discuss this collaboration further at **The Open Frontier**, Tenstorrent's RISC-V ecosystem event in Bengaluru on October 8, 2026, where Sandeep Pendharkar, CTO & VP Engineering at Vayavya Labs, will join the panel "Latest in RISC-V Products & Startups," moderated by Tenstorrent's Divyang Agrawal, VP of RISC-V Cores/IP. About Tenstorrent Tenstorrent is an AI compute company led by CEO Jim Keller - architect of Apple A4/A5, AMD Zen, and Tesla's Full Self-Driving chip. The company builds RISC-V-based AI processors and systems for developers, enterprises, and sovereign infrastructure worldwide. In addition to servers and workstations, Tenstorrent licenses its TT-Ascalon RISC-V CPU and Tensix AI cores to chip designers. Backed by leading technology and financial investors, Tenstorrent has raised more than $1 billion and operates from Santa Clara, Austin, Toronto, Belgrade, Tokyo, and Bengaluru. About Vayavya Labs Vayavya Labs is a Silicon-to-Systems technology solutions company headquartered in Belagavi, India, with a development center in Bengaluru. Vayavya Labs specializes in hardware-software interface tools, Digital Twins, ECU virtualization, ADAS verification & validation services, and agentic AI platforms for SystemC-based virtual prototyping, serving semiconductor and automotive customers worldwide. Media Contact Justin Mauldin, Salient PR, 1 001-737.234.0936, [email protected], salientpr.com SOURCE Vayavya Labs

Tenstorrent

RISC-5 CPU Intern

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About the company

Get referred to Tenstorrent

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