Firmware Engineer Intern
Astera Labs
Firmware Engineer Intern
Astera Labs
Designs chips that connect data center systems
Astera Labs • Ottawa, ON • On-site • Full-time
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. Our Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ technologies with the COSMOS software suite to help customers build cohesive, flexible AI infrastructure.
Our analog and Ethernet connectivity products sit in the critical signal path of optical modules, copper interconnects, and high-speed networking infrastructure. The firmware controlling these devices drives adaptive behavior, calibration sequences, link management, diagnostics, and real-time performance across products deployed in data centers worldwide.
As a Firmware Engineer on our Ottawa-based team, you will work alongside experienced engineers on embedded firmware development, hardware bring-up, test automation, and validation. You will contribute across the product lifecycle—from silicon bring-up and low-level debug through characterization and production—and build practical expertise at the intersection of firmware, analog and mixed-signal systems, and high-speed connectivity.
This is a hands-on role in a fast-moving environment. You will work closely with firmware, silicon design, system validation, and applications teams, communicate progress and blockers clearly, and take on problems that cross the hardware/software boundary.
Write and modify embedded C/C++ firmware for analog and Ethernet connectivity devices.
Implement register configuration, state machines, calibration sequences, control loops, link management, SERDES configuration, and diagnostics.
Contribute to analog-control features such as gain settings, equalization parameters, feedback behavior, and thermal or operating-condition management.
Read datasheets, work with memory-mapped registers, and debug firmware behavior on real hardware.
Participate in code reviews and keep the firmware codebase clean, maintainable, and well documented.
Support low-level hardware bring-up and debug alongside senior firmware engineers.
Develop Python scripts to automate test flows, collect and analyze data, and improve engineering efficiency.
Help develop and execute validation plans across operating conditions, link states, configurations, and corner cases.
Contribute to firmware characterization and systematic failure triage using lab equipment such as oscilloscopes, BERTs, logic analyzers, and related tools.
Help build CI infrastructure and automated test tooling as the team grows.
Work with silicon design, system validation, and applications teams to understand requirements, investigate failures, and deliver targeted fixes.
Participate in architecture discussions and technical tradeoff decisions.
Track work, keep project tickets current, flag blockers early, and communicate clearly with teammates.
Build familiarity with how analog and Ethernet connectivity products move from silicon to production.
Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field.
2–5 years of experience writing embedded C/C++ firmware on real hardware.
Comfort working at the hardware/software boundary, including reading datasheets, accessing registers, and interpreting hardware behavior from software.
Familiarity with Linux development tools such as gcc or clang, make, Bash, gdb, and git.
Some experience with Python scripting for test automation, data analysis, or engineering utilities.
Strong problem-solving skills, a systematic debugging approach, and persistence with difficult technical issues.
Clear written and verbal communication skills and a collaborative working style.
Hands-on experience with Ethernet at the system or device level, including Layer 1 PHYs, SERDES, retimers, gearboxes, NICs, or related devices.
Exposure to analog or mixed-signal systems, including ADC/DAC interfaces, signal conditioning, calibration, or feedback and adaptive-control concepts.
Understanding of signal-integrity concepts such as equalization, jitter, eye diagrams, channel loss, or link margin.
Background with RTOS, device drivers, bare-metal microcontrollers, or resource-constrained firmware.
Familiarity with transimpedance amplifiers, transmit drivers, CTLE/DFE equalization, CDR/PLL circuits, optical modules, high-speed copper connectivity, or PCIe physical-layer implementations.
Experience with lab equipment such as oscilloscopes, BERTs, logic analyzers, or equipment from Keysight, Tektronix, LeCroy, Viavi, Exfo, or similar vendors.
Experience with FPGA emulation, pre-silicon validation, hardware simulation, Jenkins, or automated test infrastructure.
Prior semiconductor, networking, hardware, internship, or co-op experience.
This is an on-site position based in Ottawa, ON.
The anticipated salary range for this Canada Engineering L1 role is CAD $45-55/hour.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Designs chips that connect data center systems
Astera Labs designs chips and hardware modules that move data between processors, memory and accelerators in data centers. Its customers include cloud providers, chip vendors and equipment makers building servers and large computing clusters for AI and other workloads. Retimers restore signal quality, switches connect devices and memory controllers expand the memory available to computing systems, while COSMOS software monitors and manages these links. The company sells its products directly and through distributors, using outside manufacturers to fabricate and assemble its hardware. Astera Labs was founded in 2017 and is headquartered in San Jose, California.
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