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Omni Design Technologies

Licenses high-performance IP cores for SoCs

Senior Semiconductor Compiler Architect

Systems Software EngineeringConfirmed live in the last 24 hours
Full-timeNo salary listed

About the Job

Requirements

  • At least 10 years working on circuit compilers for the semiconductor industry, such as memory compilers, register file and SRAM generation, and software-driven circuit topology creation.
  • At least 5 years of experience developing high-level specifications for complex software architecture.
  • Good knowledge of analog and digital circuits.
  • Intimate experience with software toolchains that enable the creation of GDSII files from a list of high-level specifications.
  • Significant experience in object-oriented programming, such as Python, Java, or C++.
  • Good exposure to test-driven software development.
  • Knowledge of industry-standard circuit, design, and integration tools.
  • Exposure to SKILL coding.
  • Exposure to machine learning algorithms.

Responsibilities

  • Build the required software toolchain to enable advanced data converters to be automatically generated.
  • Develop a comprehensive ecosystem that enables the quick turnaround of a variety of core IP.

About the Company

Omni Design Technologies

Licenses high-performance IP cores for SoCs

Omni Design Technologies delivers high-performance, ultra-low power IP cores for mixed-signal SoCs that power devices across 5G, LiDAR, automotive networks, AI, image sensing, and IoT. It develops and validates IP blocks and licenses them to chip makers, offering customization and support to ensure seamless integration into customer designs. The cores are designed to work on FinFET processes down to 28nm, with proven silicon such as gigasample low-power ADCs and DACs on TSMC 28nm. The company differentiates itself through validated, silicon-proven IP, deep collaboration with customers and partners (e.g., LeddarTech, MegaChips), and a global design footprint (new Fort Collins design center). Its goal is to enable customers to build sophisticated, power-efficient, mixed-signal SoCs quickly by providing ready-to-license IP plus engineering services that fit their specific needs.

Company size
51-200
Company stage
Series A
Total funding
$35M
Headquarters
Milpitas, CA
Founded
2015

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