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Baya Systems

Develops software-driven NoC designs for SoCs

Manager/Director of Hardware Engineering

Engineering LeadershipConfirmed live in the last 24 hours
Full-timeSanta Clara, CA, USA

About the Job

Requirements

  • A B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
  • At least 8 years of industry experience in ASIC/IP development, including at least 2–3 years in a technical leadership or management role.
  • A strong background in high-speed protocols such as PCIe, UCIe, CXL, Ethernet, or advanced SerDes.
  • Proficiency in SystemVerilog, Verilog, and industry-standard EDA simulation and synthesis flows.
  • A deep understanding of modern verification methodologies (UVM/OVM), constrained random testing, formal verification, and coverage analysis.
  • Ability to adapt and solve problems proactively, with a track record of delivering results in a dynamic, fast-moving environment.

Responsibilities

  • Directly manage, mentor, and grow a team of 8–12 RTL and design verification engineers.
  • Drive development of high-speed interconnect IP from microarchitecture specifications through RTL implementation and tape-out.
  • Oversee development of robust, coverage-driven verification test plans, UVM/OVM environments, and emulation platforms.
  • Work with architecture, physical design, and system teams to balance power, performance, area, and timing requirements.
  • Define and establish engineering metrics, standard methodologies, and agile project management tools to meet tape-out milestones.

About the Company

Baya Systems

Develops software-driven NoC designs for SoCs

Baya Systems develops intelligent, software-driven Network on Chip (NoC) designs that optimize data movement across SoCs and chiplets. Its WeaveIP portfolio uses a unified transport fabric for coherent and non-coherent protocols, delivering high throughput with reduced silicon footprint. The NoC is customizable to any topology and can extend to custom protocols, supported by WeaverPro software for analysis, modeling, and optimization to guarantee target workloads. Their goal is to enable scalable, low-risk, cost-efficient AI accelerators, data centers, automotive, and IoT applications.

Company size
51-200
Company stage
Series B
Total funding
$36M
Headquarters
Santa Clara, CA
Founded
2023

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