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Koch Industries

Private conglomerate in energy and materials

Senior Foundry and OSAT Manager

Hardware EngineeringConfirmed live in the last 24 hours
Full-timeFremont, CA, USA$190k - $230k /yr

About the Job

Requirements

  • A master's degree in Electrical Engineering, Materials Science and Engineering, Physics, Semiconductor Physics, Process Engineering, Mechanical Engineering, or a closely related technical discipline.
  • Extensive professional experience in semiconductor foundry engineering, process engineering, product engineering, assembly, packaging, test, or backend manufacturing.
  • Demonstrated experience managing technical activities with semiconductor foundries, outsourced semiconductor assembly and test providers, bumping houses, or other outsourced semiconductor manufacturing partners.
  • Strong working knowledge of semiconductor backend operations, including wafer sort, wafer preparation, bumping, redistribution layers, dicing, flip-chip, wire bonding, BGA or CSP assembly, underfill, and final test.
  • Experience with semiconductor or package qualification, reliability testing, failure analysis, yield improvement, and manufacturing issue resolution.
  • Ability to review and interpret semiconductor design rules, package drawings, process flows, qualification data, and PCB or substrate layouts.
  • Strong analytical and problem-solving skills, including the ability to use manufacturing, wafer, yield, and test data to guide decisions.
  • Demonstrated ability to lead cross-functional technical discussions involving internal engineering teams and external suppliers.
  • Excellent written and verbal communication skills in English.
  • Ability to work effectively across global time zones, participate in occasional meetings outside standard business hours, and travel to supplier sites as needed.

Responsibilities

  • Serve as the primary technical point of contact for semiconductor foundries, bumping suppliers, outsourced semiconductor assembly and test partners, and other backend manufacturing vendors.
  • Coordinate technical reviews, process readiness, manufacturing schedules, qualification activities, supplier change notifications, deviations, and issue resolution.
  • Manage multiple outsourced manufacturing partners and align their deliverables with ASIC development, product introduction, and program milestones.
  • Support supplier assessments, process transfers, second-source qualifications, and manufacturing risk mitigation.
  • Track supplier yield, quality, qualification, and technical performance, escalating critical issues when necessary.
  • Provide technical ownership of outsourced semiconductor backend processes, including wafer bumping, redistribution layers, wafer thinning and dicing, die attach, flip-chip assembly, wire bonding, BGA or CSP assembly, underfill, multi-chip integration, wafer sort, and final test.
  • Define, review, and maintain package and assembly specifications, drawings, process requirements, and quality criteria.
  • Review and approve supplier process flows, design-for-manufacturing reports, process change notifications, qualification plans, and manufacturing deviations.
  • Work with package, substrate, PCB, and SMT engineers to align package-side and board-side requirements, including ball maps, pitch, coplanarity, land and stencil design, reflow, underfill, standoff, escape routing, and rework requirements.
  • Provide subject-matter expertise to system, module, silicon photonics, laser, ASIC, and related development teams.
  • Support ASIC product introduction from design-rule review and tapeout through wafer fabrication, backend assembly, qualification, product bring-up, and production release.
  • Define inspection, test, and qualification criteria for semiconductor packages and assembled products.
  • Coordinate qualification activities involving X-ray, acoustic imaging, cross-section analysis, scanning electron microscopy, shear and pull testing, warpage measurement, known-good-die test coverage, and applicable reliability testing.
  • Establish wafer and product acceptance criteria in collaboration with design, test, manufacturing, supplier, and quality teams.
  • Review qualification and reliability data, identify technical risks, and lead closure of qualification gaps or failures.
  • Monitor wafer, assembly, and final-test performance to identify yield excursions, process shifts, parameter drift, and systemic manufacturing issues.
  • Lead structured problem-solving and failure analysis for fabrication, package, reliability, test, and customer-return issues.
  • Coordinate root-cause investigations with suppliers and internal engineering teams, including definition of containment and corrective actions.
  • Analyze inline, wafer acceptance, wafer-sort, assembly, and final-test data to support technical decisions and process improvements.
  • Review supplier process controls, capability data, quality trends, and corrective-action effectiveness.
  • Coordinate backend and foundry activities with ASIC design, computer-aided design, product, test, quality, reliability, system, packaging, supply-chain, and project-management teams.
  • Translate product and system requirements into actionable foundry, assembly, package, and test requirements.
  • Communicate technical risks, alternatives, recommendations, and decisions clearly to engineering teams and program leadership.
  • Support semiconductor and packaging activities that span multiple Molex divisions or product groups.
  • Maintain clear engineering reports, qualification records, process documentation, decision logs, and internal technical knowledge.

Desired Qualifications

  • Ten or more years of relevant semiconductor-industry experience, with substantial responsibility for foundry, backend, packaging, product, yield, reliability, or outsourced semiconductor assembly and test management.
  • Experience supporting advanced semiconductor process nodes and complex ASIC product introductions.
  • Experience with multi-project wafer runs, new-product introduction, tapeout readiness, design-rule review, second-source qualification, and production transfer.
  • Familiarity with JEDEC and IPC qualification or assembly standards.
  • Experience with multi-chip modules, co-packaged devices, fan-out or redistribution-layer-based packaging, organic or ceramic substrates, or high-temperature co-fired ceramic/low-temperature co-fired ceramic technologies.
  • Experience supporting mixed-signal, high-voltage, MEMS, optical-module, silicon-photonics, or laser-related products.
  • Working proficiency in Mandarin Chinese or experience managing suppliers in Taiwan and China.
  • Experience creating technical knowledge bases, engineering decision records, and executive-level technical reports.

About the Company

Koch Industries

Private conglomerate in energy and materials

Koch Industries is a large, private, diversified conglomerate that operates in energy, chemical processing, and manufacturing. It started from an innovation that turned heavy crude oil into gasoline and grew through long‑term investments rather than short‑term market moves. The company generates value by refining fuels and producing chemical products, and it operates Georgia-Pacific, a major maker of paper and building products. Its business model relies on reinvesting most earnings back into the company to fund steady, long‑term growth rather than paying out frequent dividends or seeking quick profits. Koch differentiates itself from many competitors by staying privately owned, which reduces pressure from public markets and enables longer‑range planning. The company’s goal is to build scale and durability across its holdings by sustainable, multi‑decade growth rather than rapid, episodic gains.

Company size
5,001-10,000
Company stage
Growth Equity (Non-Venture Capital)
Total funding
$985.2M
Headquarters
Wichita, KS
Founded
1940

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