Networking Silicon Architect - Google Cloud

• Evaluate different silicon solutions for executing Google’s data center networking roadmap, off-the-shelf components, vendor co-developments, custom designs, and advanced silicon integration technologies.
• Design high-performance hardware/software interfaces.
• Collaborate closely with system, software, verification, emulation, physical design, packaging, and silicon validation stakeholders to ensure that designs are complete, correct, and performant.
• Drive vendor execution in various engagements: standard component roadmaps, build to specification, and co-developments.
• Contribute to the evaluation of future ASIC designs and general architecture.

Minimum qualifications:

• Bachelor's degree or equivalent practical experience.
• 15 years of experience experience architecting networking ASICs from specification to production.
• Experience working with network architecture and system design principles for low latency, high throughput, security, and reliability.
• Experience developing RTL for ASIC subsystems.
• Experience in micro-architecture, design, verification, logic synthesis, and timing closure.
• Experience in architecting networking and ASIC IPs.

Preferred qualifications:

• Mastery of TCP, IP and Ethernet protocols.
• Experience working with software teams optimizing the hardware/software interface.
• Experience with scripting languages, particularly Python and shell.
• Deep understanding of packet classification, processing, queueing, scheduling, switching, routing, traffic conditioning, and telemetry.
• Deep understanding of complex, large-scale ASIC and SoC architectures.
• Adept in estimating performance by analysis, modeling, and network simulation. Skilled in defining and driving performance test plans.

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

As a part of the team, you will define solutions for high-performance network accelerators and interconnects in data centers. You will have dynamic, multi-faceted responsibilities in areas such as project definition, with close collaborations with data center systems and Software teams. You will participate in the design, architecture, documentation, and implementation of the next generation of data center networking infrastructure.

You will be responsible for performance analysis for an end-to-end networking stack using your deep knowledge of high speed network infrastructure.
The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're behind Google's groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.

• Bachelor's degree or equivalent practical experience.
• 15 years of experience experience architecting networking ASICs from specification to production.
• Experience working with network architecture and system design principles for low latency, high throughput, security, and reliability.
• Experience developing RTL for ASIC subsystems.
• Experience in micro-architecture, design, verification, logic synthesis, and timing closure.
• Experience in architecting networking and ASIC IPs.