ASIC Test Engineer

<h2 style="color:!important"><span style="color:#00b0f0"><span><b>What You'll Do</b></span></span></h2><p style="color:!important"><span style="color:#000000"><span>Our team would define, design and verify ASIC and ASIC subsystems to be deployed in a range of Cisco platforms. Contribute to a multi-disciplined engineering team to meet the power, performance, and area goals for products. Design, document, and develop ASIC subsystems for release in high volume and quality. Help define the process, methods, and tools for design and implementation of complex developments</span></span><span><span></span></span></p><p style="color:!important"><span style="color:#000000"><span>We also develop custom test solutions spanning high power, large dies, and network silicon to cost-sensitive products. </span></span><span><span></span></span></p><p style="color:!important"><span style="color:#000000"><span>You will partner with the ASIC Engineering team and OSATs to transfer the SLT test programs from the Cisco to the OSAT production environment.</span></span><span><span></span></span></p><p style="color:!important"><span style="color:#000000"><span>Meanwhile, you are the first line of defense as the first responder in case of any production issues - hardware or software-related. You will be responsible for the prompt resolution of any test issues and drive OSATs to meet metrics for throughput, yield, cycle time, and uptime. </span></span><span><span></span></span></p><p style="color:!important"><span style="color:#000000"><span>Your role will not only ensure that the OSAT capacity ramp plans but also align with the Cisco product roadmap to manage/maintain the production test environment.</span></span><span><span></span></span></p><p style="color:!important"><span style="color:#000000"><span>So you will closely work with the ASIC Test Development, Automation and Data Solutions team to perform statistical data/yield/correlation analysis to drive SLT optimization. </span></span><span><span></span></span></p><p style="color:!important"><span style="color:#212121"> </span></p><h2 style="color:!important"><span style="color:#00b0f0"><span><b>Who You'll Work With</b></span></span></h2><p style="color:!important"><span style="color:#000000"><span>• Collaborate with Silicon design teams as well as several peer groups in Supply Chain & MFG Operations to influence Cisco Silicon One Productization Strategy.</span></span><span><span></span></span></p><p style="color:!important"><span style="color:#000000"><span>• Drives the definition, architecture and design of high-performance ASICs</span></span><span><span></span></span></p><p style="color:!important"><span style="color:#000000"><span>• Owns complex or multiple functional areas</span></span><span><span></span></span></p><p style="color:!important"><span style="color:#000000"><span>• Develops reusable code for future projects</span></span><span><span></span></span></p><p style="color:!important"><span style="color:#000000"><span>• Debugs & Design at Probe Card, Load Board and HW level</span></span><span><span></span></span></p><p style="color:!important"><span style="color:#000000"><span>• Works with ASIC and Apps, with limited external scope</span></span><span><span></span></span></p><p style="color:!important"><span style="color:#212121"> </span></p><p style="color:!important"><span style="color:#00b0f0"><span><b>Who You Are/ R&R Requirement</b></span></span></p><p style="color:!important"><span style="color:#20262e"><b>Minimum qualifications:</b></span><span></span></p><ul><li style="color:!important"><span style="color:#44546a">Bachelor's degree in Electrical Engineering, Material Engineering, a related technical field, or equivalent practical experience.<span></span></span></li><li style="color:!important"><span style="color:#44546a">5 years of experience with hardware development of systems based on custom ASICs or SoC products.<span></span></span></li><li style="color:!important"><span style="color:#44546a">Ability to thrive in a multifaceted environment.<span></span></span></li><li style="color:!important"><span style="color:#44546a">High level of motivation and energy. </span></li></ul><br /><p><span style="color:#44546a"><span></span></span></p><p style="color:!important"><span style="color:#20262e"><b>Preferred qualifications:</b></span><span></span></p><ul><li style="color:!important"><span style="color:#20262e">Master's degree or PhD in Electrical Engineering, Computer Science, or a related field.<span></span></span></li><li style="color:!important"><span style="color:#20262e">8 years of experience with hardware or semiconductor testing.<span></span></span></li><li style="color:!important"><span style="color:#20262e">Experience implementing secure ASIC/SoC manufacturing solutions (e.g., handler and product lifecycle management).<span></span></span></li><li style="color:!important"><span style="color:#20262e">Knowledge of CP and ATE field<span></span></span></li><li style="color:!important"><span style="color:#20262e">Experience with OSAT and operation management</span></li></ul><br /><p><span style="color:#20262e"><span></span></span></p><p style="color:!important"><span style="color:#212121">Siops </span></p><p></p><h1>Why Cisco? </h1><p>At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.</p><p>Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. </p><p>We are Cisco, and our power starts with you. </p><p></p>