Investment Analyst

Emergence AI brings neuroformal AI to semiconductor yield optimization. Article by: Yashasvini Razdan. Startup Emergence AI is working with fabless chipmakers to improve wafer yields and explore AI-driven manufacturing analysis with IDMs. Emergence AI said it is moving its neuroformal AI technology into active deployments with fabless semiconductor companies, while integrated device manufacturers (IDMs) among its customers are asking the company to extend the work into the fab. The startup also targets the data generated during manufacturing to identify early signs of degradation before a problem affects a large number of wafers. In an interview with EE Times at SEMICON India 2026, Satya Nitta, co-founder and executive chairman of Emergence AI, said, "You cannot make chips any faster, but what you can do is definitely get more chips per wafer yielding with AI." Nitta said demand for chips exceeds supply and every fab is running at capacity, so more wafers cannot be pushed through. The way to ease the shortage is to get more chips per wafer yielding, which requires analyzing the data, he said. Nitta said neuroformal AI pairs the creativity of large language models (LLMs) with the discipline of symbolic AI, an older approach based on formal rules that was "all of AI" before the deep learning era. "Algorithms propose, and symbolic AI verifies," he said. The aim is to develop AI that gives "provably correct" answers that engineers can depend on for mission-critical problems, because LLMs are probabilistic. Nitta became executive chairman and chief scientist about a month ago, when Emergence AI appointed Ian Eslick as CEO, according to a LinkedIn post by Nitta. He said he will lead the company's long-term research agenda, advance neuroformal AI, and deepen key partnerships, while Eslick leads the company through its next stage of commercialization and scale. Eslick founded Silicon Spice, an MIT spinout that Broadcom acquired for $1.2 billion, and later led major technology initiatives at U.S. Bank and SoFi, according to the post. Fabless companies and yield analysis Nitta said Emergence AI started with the fabless part of the semiconductor value chain. Fabless companies design the product but do not control the manufacturing process, he said. They have data on the chip itself, such as functional, parametric, and overall yield, but not on what happens in the fab. He said the analysis can show whether a yield excursion stems from a process issue in the fab, a design issue, or a test issue. "Wafer and final test issues are not uncommon," he said. "The probe cards do not make perfect contact. I may have to retest it." He said AI agents can analyze this data at scale and remember patterns seen across products. As an example, he described an agent that finds the same pattern across 30% of 1,500 products, with failures in a ring oscillator block, and suggests redesigning that block. "These are the kinds of things that AI agents can do that are beyond human cognitive limits," he said. Nitta said the company's domain-specific agents also carry out root-cause analysis. They have to distinguish a spurious correlation from the actual cause, using an understanding of device physics. Asked whether the company competes with today's LLMs and GPTs, Nitta said, "I would not say directly competing. We are saying that the LLMs are necessary but not sufficient." He also said LLM-based AI is "useful but incomplete for mission-critical problems." Physics-driven failures in advanced packaging Nitta said the company is beginning to move into advanced packaging. Because many packaging technologies are still being developed, he said, the question is less about what went wrong in the process and more about fundamental root causes. One example is a coefficient of thermal expansion (CTE) mismatch. "It is much more a physics problem," he said. He said AI agents would need to run finite-element and multiscale physics simulations to show, for example, that a liner material and copper are incompatible, or that a glass substrate and copper have a large CTE mismatch, causing things to fall apart in thermal cycling. He said that if the via were redesigned, the aspect ratio changed, or the liner thickness increased, "the process window is more mature." Nitta said Emergence AI is in active discussions with several advanced packaging companies that could lead to memoranda of understanding. He said he expects several announcements about these engagements in the next two to three months. The company has no active engagements with semiconductor tooling companies, he said. Nitta said some of the fabless customers are IDMs, which have "both the fabless component and fabs." The work starts in the fabless part, he said, and the IDMs are now asking the company to work in the fab. The work in the fab is "still at a very early stage," he added. Some of the fabless customers are among the largest companies in the industry but he could not name them on the record. India: focus, talent, and open-source In India, the company's focus is limited to semiconductors, Nitta said. Emergence AI is primarily working post-tape-out and is not currently involved in chip design, though that could change in the future. He said verification is one of the longest steps in chip design and that neuroformal AI can accelerate the process. The company is also talking with several potential Indian customers, but Nitta said he could not name them. "We are in the middle of several discussions," he said. Nitta said Emergence AI intends to grow its talent pool to 500 engineers and R&D scientists within two years. EE Times had earlier reported a timeframe of three to four years. This summer, the company conducted a summer school on Lean, an open-source programming language and proof assistant, for more than 150 students, under the guidance of professor Siddharth Gadgil, chief scientist of Emergence India Labs and a professor at the Indian Institute of Science (IISc), and professor Ilya Sergey at the National University of Singapore. Nitta said talent for this work is scarce, so the company is creating it. The company has identified a group of people to whom it is extending talent retention offers. Nitta said the company has open-sourced parts of its technology from the beginning and is now open-sourcing some of its Lean work with Gadgil and Emergence India Labs. He said aspects of the neuroformal AI work will also be open-sourced to build a community and widen the pool from which the company recruits. He pointed to Agent-E, an open-source web navigation system the company released in 2024 that automates complex browser tasks using simple natural language. He described it as "the very first autonomous web agent build that was fully open-source" and "the very first time somebody actually open-sourced a complex hierarchical agentic system." Agent-E is available on GitHub. Nitta indicated that the neuroformal AI work will follow a similar path. He added that the semiconductor industry is only beginning to explore what autonomous agents can do. "I am delighted to see that even in India, there is enormous growth and support from the central government," Nitta said. "But we are just scratching the surface." Yashasvini Razdan is the senior India correspondent for EE Times. With a bachelor's degree in electronic engineering from Mumbai University and a post-graduate diploma in business journalism, she has served in various senior editorial roles in leading Indian electronics and business publications, where she reported on semiconductor innovations, deep tech startups, and the Indian electronics ecosystem. She is passionate about combining her technical know-how and journalistic acumen to chronicle the evolution of India's electronics ecosystem for a global audience.

Emergence, a frontier agentic AI lab, announced its research arm achieved state-of-the-art results on verified code generation and formal reasoning benchmarks. The company's Craft platform topped the VeriSoftBench-Aristotle benchmark with a 99% score. On the VeriContest LeetCode problem set, Craft's Verified Code Generation component passed both formal proof and testing checks on 19.16% of problems, outperforming Claude Opus 4.7 at 15.36%, GPT-5.5 at 7.10%, Claude Sonnet 4.6 at 6.67%, and Gemini 3.1 Pro at 4.78%. Emergence's VCG/Tiny Prover system solved 100% of VERINA problems and 99% of VeriSoftBench problems on first attempt. The company's approach combines neural reasoning with formal verification to enable autonomous AI systems that can independently confirm their outputs are correct.