Senior Technical Lead

<strong>Job Requirements </strong><br><p><br><strong>Company:</strong> Quest Global Services-N.A., Inc.<br><strong>Position Title:</strong> Sr. Technical Lead<br><strong>Location:</strong> 175 Addison Rd, Entrance A, Windsor, CT 06095 and unanticipated client<br>locations throughout the U.S.</p><p><br><strong>Position Responsibilities:</strong> Verification and Validation of FPGAs, support project execution by<br>reviewing engineering artifacts and ensuring verification deliverables meet design and quality<br>requirements by performing timely reviews of all the artifacts generated by the team(s).<br>Requirements Review, Verification and Validation of FPGAs. Collaborate with cross-functional<br>engineering teams and provide technical guidance on verification activities. Perform the<br>certification documentation reviews and baseline the certification plans. Create planning<br>documentation – Plans, PHAC, HVVP, HCMP, and HPAP. Develop Simulation test benches using<br>languages such as System Verilog and UVM. Create simulation test cases and procedures<br>document. Create Problem reports/Change Requests, co-ordinate all the problem reports/change<br>requests created by remote team(s) and drive them to closure. Coordinate with Change Control<br>Board (CCB), participate in CCB Meetings with Customer Technical Team(s) to get the change<br>requests/problem reports approved. Document the issues identified in requirements and design,<br>communicate with Customer technical team(s) and drive to closure. Communication of DO-254<br>certification aspects with Customer and its customers. Participate in all the technical reviews,<br>implement the findings, guide the team(s) on complex findings to ensure compliance to DO-254<br>DAL A objectives and drive to closure Participate in certification audits and compliance reviews<br>with customer and regulatory stakeholders., throughout the program, document the audit actions<br>and drive them to closure. Participate in all the daily/weekly status meetings and drive the entire<br>team(s) per customer/program expectations.</p><p><br><strong>Position Requirements:</strong> Bachelor’s degree (or foreign equivalent) in Electronics Engineering, or a<br>related field, PLUS five (5) years of experience in the job offered or a related position. Experience<br>must include demonstrable knowledge of: System Verilog; UVM methodologies; UVM RAL<br>Model, ASIC/FPGA verification; RTL debugging; waveform analysis; C/C++; DPI; Python; Perl;<br>PCIe; SPI; I2C; Ethernet; DDR; ARINC; AMBA-AXI; AHB; VIP; HIL test setups; JTAG; logic<br>analyzers; Synopsys VCS; Cadence Xcelium/Incisive; Mentor QuestaSim; Git; SVN; DOORS;<br>JIRA; DO-254; PHAC; HVVP; HCMP, and CCB. Required knowledge may be gained prior to or<br>concurrently with Bachelor's degree. Travel to unanticipated client locations throughout the U.S.,<br>approximately 30%, as required. May telecommute from any location within the U.S.<br> </p><p>Apply at careers.quest-global.com and reference Job Code 28290.0340</p><br><br>