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Astera Labs

Designs chips that connect data center systems

Hardware Lab Engineer

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeSan Jose, CA, USA$160k - $200k /yrIn-person

About the Job

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or related field
  • 5-12+ years of hands-on experience in lab environments supporting silicon validation or hardware development
  • Proficiency with high-speed test equipment (oscilloscopes, protocol analyzers, BERTs, multimeters)
  • Experience with high-speed interface testing (PCIe, CXL, DDR, Ethernet, or SerDes)
  • Strong programming skills in Python for test automation
  • Familiarity with Linux operating systems and command-line tools
  • Demonstrated experience coordinating with third-party testing laboratories and managing logistics, including sample shipping, chain of custody, and scheduling
  • Strong organizational skills for managing multiple RMA cases simultaneously and prioritizing based on severity/impact

Responsibilities

  • Setup and maintain test environments for silicon validation and characterization. Configure and update hardware, software, firmware, and applications. Replicate BKCs.
  • Conduct hands-on testing of silicon devices including PCIe Gen5/6/7, CXL, Ethernet, and other high-speed interfaces
  • Install and configure servers, including FW, BIOS, OS, and network
  • RMA intake/triage: inspection, electrical verification, screening (including CSAM inspection), and prioritization
  • Manage logistics and communications with external labs
  • Organize, track, and distribute lab equipment, hardware, and peripherals
  • Ad hoc PCBA rework and soldering of fine-pitch SMD components
  • Develop, document, and maintain lab procedures

Desired Qualifications

  • Experience with post-silicon validation of ASICs, SoCs, or Retimer/PHY products
  • Knowledge of analog/mixed-signal circuit testing and debugging techniques
  • Experience with JTAG, I2C, SPI, and other embedded interfaces
  • Familiarity with PCB design, schematic reading, and signal integrity concepts
  • Knowledge of data center systems architecture (servers, AI platforms, networking equipment)
  • Understanding of ATE (Automated Test Equipment) systems and production test methodologies
  • Experience with defect screening methodologies including visual inspection, electrical testing, and acoustic imaging
  • Experience with complete RMA lifecycle management from intake through root cause analysis and corrective action
  • Knowledge of common semiconductor failure modes and failure analysis techniques including die attach inspection, delamination detection, void analysis, and crack identification
  • Experience with formal compliance testing and industry standards

About the Company

Astera Labs

Designs chips that connect data center systems

Astera Labs designs chips and hardware modules that move data between processors, memory and accelerators in data centers. Its customers include cloud providers, chip vendors and equipment makers building servers and large computing clusters for AI and other workloads. Retimers restore signal quality, switches connect devices and memory controllers expand the memory available to computing systems, while COSMOS software monitors and manages these links. The company sells its products directly and through distributors, using outside manufacturers to fabricate and assemble its hardware. Astera Labs was founded in 2017 and is headquartered in San Jose, California.

Company size
501-1,000
Company stage
IPO
Headquarters
San Jose, CA
Founded
2017

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