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Astera Labs

Designs chips that connect data center systems

Product Applications Engineer

Hardware Systems IntegrationConfirmed live in the last 24 hours
Full-timeSan Jose, CA, USAIn-person

About the Job

Requirements

  • A B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field, completed or expected by the start date.
  • Strong coursework or foundation in digital logic design, computer architecture, analog/mixed-signal circuits, or embedded systems.
  • A GPA of 3.5 or higher, or equivalent demonstrated excellence in technical coursework.
  • Proficiency in C for bare-metal or embedded firmware development.
  • Understanding of register-level hardware interaction, memory-mapped I/O, bit manipulation, and interrupt-driven programming.
  • Understanding of basic circuit analysis, op-amp circuits, power supply design, signal conditioning, or mixed-signal concepts.
  • Ability to reason about voltage levels, impedance, noise, and how digital signals behave as analog waveforms at high speeds.
  • Strong Python skills.
  • Experience writing test automation scripts, parsing hardware logs, processing data, and interfacing with hardware over serial, I2C, or SMBus protocols.
  • Hands-on experience with oscilloscopes, spectrum analyzers, logic analyzers, multimeters, function generators, JTAG debuggers, or serial terminal interfaces.
  • Understanding of bus protocols, state machines, link-layer concepts, clock domain crossings, and how hardware and firmware interact at the register level.
  • Ability to clearly document findings, write bug reports, and produce concise technical summaries for internal engineering teams and external customers.

Responsibilities

  • Tackle complex debugging challenges spanning low-level firmware configuration, PCB hardware design, and full system-level integration.
  • Root-cause issues that cross multiple layers, determine whether they stem from firmware bugs, board design problems, or system configuration mismatches, and drive them to resolution.
  • Work directly with PCIe Gen6 fabric switches and connectivity products deployed in real data center environments.
  • Collaborate with firmware, board design, and system architecture teams.
  • Take real measurements and correlate them with expected circuit and system behavior.

Desired Qualifications

  • Coursework or project experience involving PCIe, USB, Ethernet, SPI, UART, or I2C, and understanding how data moves between ICs and how link negotiation and training work.
  • Exposure to transmission line theory, impedance matching, S-parameters, eye diagrams, or PCB stack-up design through coursework or projects in electromagnetics or high-speed digital design.
  • Experience building or modifying embedded firmware, flashing and debugging via UART/JTAG, reading register dumps, and correlating firmware state with hardware behavior.
  • Ability to read hardware schematics and board layouts, with an understanding of power delivery, decoupling, high-speed trace routing, and via structures.
  • Verilog or VHDL coursework or project experience, with an understanding of RTL design, simulation, and synthesis.
  • Comfort working in Linux command-line environments, including SSH, shell scripting with Bash, remote system management, file systems, and basic system administration.
  • Prior internship, co-op, or significant project experience involving silicon bring-up, embedded systems debugging, FPGA-based prototyping, or hardware/firmware co-development.
  • Demonstrated ability to independently diagnose complex problems where the root cause is unclear and could span multiple engineering domains.

About the Company

Astera Labs

Designs chips that connect data center systems

Astera Labs designs chips and hardware modules that move data between processors, memory and accelerators in data centers. Its customers include cloud providers, chip vendors and equipment makers building servers and large computing clusters for AI and other workloads. Retimers restore signal quality, switches connect devices and memory controllers expand the memory available to computing systems, while COSMOS software monitors and manages these links. The company sells its products directly and through distributors, using outside manufacturers to fabricate and assemble its hardware. Astera Labs was founded in 2017 and is headquartered in San Jose, California.

Company size
501-1,000
Company stage
IPO
Headquarters
San Jose, CA
Founded
2017

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