SiTime

Fabless MEMS timing solutions provider

Senior Engineer - Infrastructure Engineering

Board & Electronics DesignConfirmed live in the last 24 hours

Full-timeIn-person

About the Job

Requirements

At least 10 years of hands-on PCB layout experience for complex, high-density electronic systems.
Expert-level capability in at least one major PCB layout platform, such as Cadence Allegro or Altium Designer, and working familiarity across common PCB design and review tools.
Demonstrated experience laying out multi-layer high-speed digital, mixed-signal, precision analog, radio-frequency, clock, and power designs.
Strong knowledge of PCB stack-ups, materials, controlled impedance, differential routing, length matching, crosstalk mitigation, return paths, grounding, and power integrity fundamentals.
Experience with fine-pitch BGAs, high-density interconnect, microvias, via-in-pad, and blind or buried vias.
Practical knowledge of PCB fabrication and assembly processes, component land patterns, solder-mask and paste-mask design, panelization, tolerances, and manufacturing documentation.
Experience applying design for manufacturability, design for assembly, and design for test principles and working directly with fabrication and assembly suppliers.
Ability to interpret schematics, mechanical drawings, PCB specifications, component datasheets, and constraint documents.
Strong attention to detail, configuration discipline, and ability to manage multiple board releases and design revisions.
Clear written and verbal communication skills and the ability to work effectively across engineering and manufacturing teams.

Responsibilities

Own PCB layout from initial placement and routing through design review, fabrication release, assembly support, and post-build updates.
Translate schematics, mechanical requirements, stack-ups, and electrical constraints into complete board layouts.
Route dense mixed-signal, high-speed digital, precision analog, radio-frequency, clock, power, and control circuitry.
Create and maintain fabrication and assembly deliverables, including Gerber or ODB++ data, drill files, drawings, pick-and-place files, and manufacturing notes.
Perform thorough design-rule checks and release-package reviews to ensure data accuracy and completeness.
Implement controlled-impedance routing, differential pairs, length matching, return-path continuity, isolation, shielding, grounding, and power-distribution requirements.
Collaborate with electrical and signal-integrity/power-integrity engineers to apply routing constraints and incorporate simulation or review feedback.
Develop practical placement and routing strategies for high-density interconnect, fine-pitch BGA, via-in-pad, blind and buried vias, and other advanced PCB technologies.
Maintain component footprints, padstacks, symbols, and library data in accordance with IPC guidance and company standards.
Conduct peer reviews and contribute to PCB layout checklists, standards, templates, and reusable design practices.
Drive design-for-manufacturability, design-for-assembly, and design-for-test reviews with PCB fabrication, assembly, test, and supply-chain partners.
Resolve fabrication and assembly questions, document deviations, and incorporate lessons learned into future layouts.
Work closely with mechanical engineers on board outlines, component clearances, keep-outs, connector locations, thermal constraints, and enclosure integration.
Support prototype bring-up and root-cause analysis by reviewing layout-related signal, power, thermal, assembly, and reliability issues.
Communicate design status, trade-offs, risks, and release readiness clearly to project stakeholders.

Desired Qualifications

A bachelor's degree, technical certification, or equivalent practical experience in electronics, electrical engineering, PCB design, or a related field.
Experience with boards used for semiconductor characterization, validation, automated test equipment, production test, probe, or laboratory instrumentation.
Familiarity with signal-integrity/power-integrity review or simulation tools and the ability to interpret analysis results and implement layout changes.
Knowledge of IPC-2221, IPC-7351, IPC-6012, IPC-A-600, IPC-A-610, or related PCB design and workmanship standards.
Experience mentoring other PCB designers and improving layout libraries, workflows, checklists, or release processes.
Experience with rigid-flex designs, thermal management, high-current power delivery, low-noise clocking, or low-jitter systems.

About SiTime

SiTime is the Precision Timing company.

Timing is the heartbeat of all electronics, ensuring performance, resilience and scalability. For decades, quartz devices, non-silicon technology, have kept systems in sync, but they struggle in harsher, more demanding environments. MEMS-based Precision Timing delivers greater accuracy, smaller size and resilience. Today, MEMS timing powers over 400 applications, including high-growth ones in AI datacenters, automated driving, industrial and humanoid robots, wearables and IoT.

Our semiconductor MEMS programmable solutions offer a rich feature set that enables customers to differentiate their products with higher performance, smaller size, lower power, and better reliability. With more than 4 billion devices shipped, SiTime is changing the timing industry. For more information, visit: www.sitime.com.

Job Summary

We are seeking a hands-on Senior PCB Layout Engineer to own the physical implementation of complex printed circuit boards used in characterization, validation, automated test equipment (ATE), production test, and internal engineering platforms. This role partners closely with hardware, signal integrity, mechanical, manufacturing, and test engineers to translate schematics and design constraints into robust, manufacturable PCB layouts. The ideal candidate brings at least 10 years of practical layout experience, strong design judgment, and a proven record of releasing high-quality boards from placement through fabrication and assembly.

It is not necessary to meet all job requirements to be a qualified candidate for the position.

Responsibilities:

PCB Placement, Routing, and Release Ownership

Own PCB layout from initial placement and routing through design review, fabrication release, assembly support, and post-build updates
Translate schematics, mechanical requirements, stack-ups, and electrical constraints into complete board layouts
Route dense mixed-signal, high-speed digital, precision analog, RF, clock, power, and control circuitry.
Create and maintain fabrication and assembly deliverables, including Gerber or ODB++ data, drill files, drawings, pick-and-place files, and manufacturing notes
Perform thorough design-rule checks and release-package reviews to ensure data accuracy and completeness

Constraint Management and Design Quality

Implement controlled-impedance routing, differential pairs, length matching, return-path continuity, isolation, shielding, grounding, and power-distribution requirements
Collaborate with electrical and SI/PI engineers to apply routing constraints and incorporate simulation or review feedback
Develop practical placement and routing strategies for high-density interconnect, fine-pitch BGA, via-in-pad, blind and buried vias, and other advanced PCB technologies
Maintain component footprints, padstacks, symbols, and library data in accordance with IPC guidance and company standards
Conduct peer reviews and contribute to PCB layout checklists, standards, templates, and reusable design practices

Manufacturing and Cross-Functional Execution

Drive DFM, DFA, and DFT reviews with PCB fabrication, assembly, test, and supply-chain partners
Resolve fabrication and assembly questions, document deviations, and incorporate lessons learned into future layouts
Work closely with mechanical engineers on board outlines, component clearances, keep-outs, connector locations, thermal constraints, and enclosure integration
Support prototype bring-up and root-cause analysis by reviewing layout-related signal, power, thermal, assembly, and reliability issues
Communicate design status, trade-offs, risks, and release readiness clearly to project stakeholders

Qualifications & Requirements:

10+ years of hands-on PCB layout experience for complex, high-density electronic systems
Expert-level capability in at least one major PCB layout platform, such as Cadence Allegro, Altium Designer, and working familiarity across common PCB design and review tools
Demonstrated experience laying out multi-layer high-speed digital, mixed-signal, precision analog, RF, clock, and power designs
Strong knowledge of PCB stack-ups, materials, controlled impedance, differential routing, length matching, crosstalk mitigation, return paths, grounding, and power integrity fundamentals
Experience with fine-pitch BGAs, HDI, microvias, via-in-pad, blind/buried vias
Practical knowledge of PCB fabrication, assembly processes, component land patterns, solder-mask and paste-mask design, panelization, tolerances, and manufacturing documentation
Experience applying DFM, DFA, and DFT principles and working directly with fabrication and assembly suppliers
Ability to interpret schematics, mechanical drawings, PCB specifications, component datasheets, and constraint documents
Strong attention to detail, configuration discipline, and ability to manage multiple board releases and design revisions
Clear written and verbal communication skills and the ability to work effectively across engineering and manufacturing teams

Desired Characteristics & Attributes:

Bachelor’s degree, technical certification, or equivalent practical experience in electronics, electrical engineering, PCB design, or a related field
Experience with boards used for semiconductor characterization, validation, ATE, production test, probe, or laboratory instrumentation
Familiarity with SI/PI review or simulation tools and the ability to interpret analysis results and implement layout changes
Knowledge of IPC-2221, IPC-7351, IPC-6012, IPC-A-600, IPC-A-610, or related PCB design and workmanship standards
Experience mentoring other PCB designers and improving layout libraries, workflows, checklists, or release processes
Experience with rigid-flex designs, thermal management, high-current power delivery, low-noise clocking, or low-jitter systems

Compensation:

At SiTime, we believe great work deserves great rewards. We offer a comprehensive and highly competitive compensation package designed to attract top talent.

In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals—reflecting our commitment to recognizing meaningful impact. We also offer equity grants, providing a meaningful opportunity to share in the company’s future growth and success.

Benefits offered: 401k plan, health and wellness that includes medical, dental, vision, life, parental leave, legal services, and time off plans.

SiTime is an Equal Opportunity Employer. We treat each person fairly and we do not tolerate discrimination or harassment against anyone on the basis of any protected characteristics, including race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, pregnancy, political affiliation, protected veteran status, protected genetic information, or marital status or other characteristics protected by law. SiTime participates in the E-Verify program.

Learn More about SiTime: Review the Get to Know SiTime section of our career page to explore our culture, values, and what makes us unique.

Pay Range

$124,920—$171,770 USD

Pay Range 124920 - 171770 USD

About the Company

SiTime

Fabless MEMS timing solutions provider

SiTime designs MEMS-based timing solutions (oscillators, network synchronizers, and jitter cleaners) as a fabless semiconductor company. MEMS resonators on silicon replace quartz to generate precise clocks and synchronize networks, with manufacturing handled by third-party foundries. The approach offers smaller size, lower power consumption, and better temperature stability, supported by scalable, design-focused development rather than in-house fabrication. Its goal is to expand MEMS timing adoption across automotive, industrial, IoT, mobile, aerospace, and telecom markets worldwide.

Company size: 501-1,000
Company stage: IPO
Headquarters: Santa Clara, CA
Founded: 2005

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