Senior ASIC Design Engineer - Multiple Teams

Our group, NTSG, develops advanced system solutions that combine ASIC, hardware, and software to enable next-generationAI networking workloads. We are building highly integrated, high-performance networking systems and are looking for experienced ASIC engineers to help drive development from architecture through production.

THE ROLE:

We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high-speed, complex ASICs. The ideal candidate has hands-on experience across the full ASIC development cycle — from RTL architectureanddesign through tapeout, silicon bring-up, and mass production.

We are seeking a Senior ASIC Design Engineer with seasonedexperience in the development of high-speed, complex ASICs. The ideal candidate has hands-on experience across the full ASIC development cycle — from RTL architectureanddesign through tapeout, silicon bring-up, and mass production.

• Architect and design key blocks for next-generationDPU ASICstargeting AI networking workloads
• Contribute across the full ASIC development lifecycle
  • architecture definition
  • microarchitecture and RTL design
  • design reviews
  • implementation support
  • tapeout
  • silicon bring-up
  • production ramp and mass deployment support
• Collaborate on advanced network processing engines, including P4-based, protocol-independent packet processing solutions
• Design and implement high-speed, complex ASIC blocks for networking and data movement applications
• Work closely with verification, modeling, software, and hardware teams to ensure functional correctness and system-level performance
• Debug and resolve issues across simulation, emulation, lab bring-up, and post-silicon phases
• Contribute to performance, power, and area optimization
• Support integration of ASIC IPs into larger SoC and system architectures
• Produce high-quality design documentation and participate in technical reviews

• Experience designing complex ARM- or RISC-V-based SoC ASICs
• Hands-on experience building complex Network-on-Chip (NoC) architectures
• Strong knowledge of AXI / AMBA protocols
• Familiarity with P4, programmable packet-processing pipelines, or protocol-independent networking architectures
• Experience with post-silicon debug, bring-up, and production support
• Experience with high-performance interconnect, data movement, and SoC integration
• Self-motivated engineer with strong ownership and execution skills
• Strong problem-solving ability and willingness to take on new technical challenges
• Continuous learner who thrives in a fast-moving environment
• Excellent communication and cross-functional collaboration skills