Full-Time

Engineer II

Hardware, FPGA

Confirmed live in the last 24 hours

Microchip Technology

Microchip Technology

10,001+ employees

Provides embedded systems hardware and software

Consulting
Hardware
Education

Compensation Overview

$68.6k - $128kAnnually

+ Restricted Stock Units + Quarterly Bonus Payments

Junior, Mid

San Jose, CA, USA

Category
Electronics Design Engineering
Embedded Systems Engineering
Electrical Engineering
Hardware Engineering
Finance & Banking
Required Skills
Verilog
VHDL
FPGA

You match the following Microchip Technology's candidate preferences

Employers are more likely to interview you if you match these preferences:

Degree
Experience
Requirements
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering or similar.
  • 0-2+ years of FPGA/ASIC IP and system design experience.
  • Experience with VHDL and/or Verilog.
  • Hands-on experience with FPGA/ASIC design and verification.
  • Strong understanding of digital design concepts and principles.
  • Excellent analytical and problem-solving skills.
  • Excellent knowledge of digital systems and computer architecture.
  • Excellent communication (written and verbal), and documentation skills.
  • Attention to detail and ability to drive tasks to completion independently in timely manner.
Responsibilities
  • Work with members of cross-functional teams to define new product features.
  • Create functional FPGA IP (Intellectual Property) units from an initial idea.
  • Assemble multiple IP complexes into a full FPGA system design including CPU subsystem, PLLs, block RAMs, DSPs, transceivers, custom IP, etc.
  • Write detailed documentation for IP and FPGA designs.
  • Create test benches to simulate and verify IP units.
  • Successfully build and test complex FPGA designs.
  • Work with hardware engineers to bring-up new boards and FPGA designs.
  • Write/create tools to use for testing.
  • Support SW engineers in development and debugging of drivers for FPGA units.
  • Work with FPGA engineers to learn existing IP and FPGA designs.
Desired Qualifications
  • Experience with Ethernet design, IEEE 1588 PTP and NTP protocols.
  • Experience with clock/frequency synthesis and measurement.
  • Experience with FPGA build tools, e.g., Libero, Quartus, or Vivado.
  • Experience with FPGA debug tools, e.g., Identify Debugger, SignalTap, or ChipScope.
  • Experience with a simulation tool, e.g., ModelSim/QuestaSim.
  • Experience with Python, TCL and/or other scripting languages.
  • Experience with board-level design.

Microchip Technology Inc. provides a wide range of hardware, software, and tools for embedded applications, including microcontrollers, FPGAs, silicon carbide solutions, and analog solutions. Their products are designed for various industries such as automotive, industrial, consumer electronics, aerospace, and telecommunications, catering to both large corporations and individual developers. Microchip stands out from competitors by offering an extensive product range and a strong support ecosystem, which includes educational programs and a community for engineers. The company's goal is to support businesses and individuals in creating electronic devices that require embedded systems, generating revenue through direct sales of products, software licenses, and consulting services.

Company Size

10,001+

Company Stage

IPO

Total Funding

$168.3M

Headquarters

Chandler, Arizona

Founded

1989

Simplify Jobs

Simplify's Take

What believers are saying

  • Growing demand for silicon carbide solutions in EVs boosts Microchip's market potential.
  • FPGAs in data centers for AI present significant growth opportunities for Microchip.
  • Industry 4.0 increases need for advanced microcontrollers, aligning with Microchip's offerings.

What critics are saying

  • Increased competition from AI-driven tools could erode Microchip's market share.
  • Rapid innovation in microchip technology may outpace Microchip's current offerings.
  • Microchip's $2 billion senior notes offering increases financial leverage risk.

What makes Microchip Technology unique

  • Microchip offers a comprehensive range of hardware, software, and tools for embedded applications.
  • Their MPLAB AI Coding Assistant enhances software development with real-time AI support.
  • Microchip's Chip-Scale Atomic Clocks provide precise timing for aerospace and defense applications.

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Benefits

Health Insurance

401(k) Retirement Plan

Stock Options

Performance Bonus

Employee Stock Purchase Plan

Company News

EE Journal
Feb 20th, 2025
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Jan 27th, 2025
Microchip Launches The Next Generation Of Its Low-Noise Chip-Scale Atomic Clock Featuring A Lower Profile Height Of Less Than [1/2] Inch

The Low-Noise Chip-Scale Atomic Clock, model SA65-LN, enables frequency mixing for battery-powered devicesCHANDLER, Ariz., January 27, 2025 — Developers need ultra-clean timing devices for aerospace and defense applications where size, weight, and power (SWaP) constraints are critical. A Chip-Scale Atomic Clock (CSAC) is an essential reference for these systems, providing the necessary precise and stable timing where traditional atomic clocks are too large or power-hungry and where other satellite-based references may be compromised. Microchip Technology (Nasdaq: MCHP) today announces its second generation Low-Noise Chip-Scale Atomic Clock (LN-CSAC), model SA65-LN, in a lower profile height and designed to operate in a wider temperature range, enabling low phase noise and atomic clock stability in demanding conditions. Microchip has developed its own Evacuated Miniature Crystal Oscillator (EMXO) technology and integrated it into a CSAC, enabling the model SA65-LN to offer a reduced profile height of less than ½ inch, while maintaining a power consumption of 295 mW. The new design is optimal for aerospace and defense mission-critical applications such as mobile radar, dismounted radios, dismounted IED jamming systems, autonomous sensor networks and unmanned vehicles due to its compact size, low power consumption and high precision. Operating within a wider temperature range of −40°C to +80°C, the new LN-CSAC is designed to maintain its frequency and phase stability in extreme conditions for enhanced reliability

EE Journal
Jan 27th, 2025
Microchip Launches The Next Generation Of Its Low-Noise Chip-Scale Atomic Clock Featuring A Lower Profile Height Of Less Than ½ Inch

The Low-Noise Chip-Scale Atomic Clock, model SA65-LN, enables frequency mixing for battery-powered devicesCHANDLER, Ariz., January 27, 2025 — Developers need ultra-clean timing devices for aerospace and defense applications where size, weight, and power (SWaP) constraints are critical. A Chip-Scale Atomic Clock (CSAC) is an essential reference for these systems, providing the necessary precise and stable timing where traditional atomic clocks are too large or power-hungry and where other satellite-based references may be compromised. Microchip Technology (Nasdaq: MCHP) today announces its second generation Low-Noise Chip-Scale Atomic Clock (LN-CSAC), model SA65-LN, in a lower profile height and designed to operate in a wider temperature range, enabling low phase noise and atomic clock stability in demanding conditions. Microchip has developed its own Evacuated Miniature Crystal Oscillator (EMXO) technology and integrated it into a CSAC, enabling the model SA65-LN to offer a reduced profile height of less than ½ inch, while maintaining a power consumption of 295 mW. The new design is optimal for aerospace and defense mission-critical applications such as mobile radar, dismounted radios, dismounted IED jamming systems, autonomous sensor networks and unmanned vehicles due to its compact size, low power consumption and high precision. Operating within a wider temperature range of −40°C to +80°C, the new LN-CSAC is designed to maintain its frequency and phase stability in extreme conditions for enhanced reliability

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