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Omni Design Technologies

Licenses high-performance IP cores for SoCs

Analog/Mixed-Signal IC Design Engineer

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeNo salary listed

About the Job

Requirements

  • A Master’s or PhD degree in Electrical Engineering focused on analog/mixed-signal circuit design is required.
  • Familiarity with high-speed, high-resolution analog-to-digital or digital-to-analog data converter design and building-block circuits such as bandgap references, operational amplifiers, comparators, oscillators, delay-locked loops, and phase-locked loops.
  • Experience evaluating silicon on the bench and familiarity with standard laboratory equipment.
  • Strong intuitive and analytical understanding of transistor-level circuit design, including noise and mismatch analysis.
  • Experience with analog and digital behavioral modeling.
  • Familiarity with Cadence schematic capture, Virtuoso, and Spectre and/or HSPICE circuit simulation tools.
  • Familiarity with layout parasitic extraction tools and layout-dependent impairments in advanced CMOS processes.
  • Ability to work independently and create and adhere to schedules.
  • Strong written and verbal communication skills and ability to work with teams across geographic locations.
  • Ability to seek help proactively.

Responsibilities

  • Design high-performance transistor-level circuits from initial specification through design and layout supervision, silicon evaluation and characterization, and final product introduction to market.

Desired Qualifications

  • Recent graduates or students close to graduation from a PhD program are preferred.

About the Company

Omni Design Technologies

Licenses high-performance IP cores for SoCs

Omni Design Technologies delivers high-performance, ultra-low power IP cores for mixed-signal SoCs that power devices across 5G, LiDAR, automotive networks, AI, image sensing, and IoT. It develops and validates IP blocks and licenses them to chip makers, offering customization and support to ensure seamless integration into customer designs. The cores are designed to work on FinFET processes down to 28nm, with proven silicon such as gigasample low-power ADCs and DACs on TSMC 28nm. The company differentiates itself through validated, silicon-proven IP, deep collaboration with customers and partners (e.g., LeddarTech, MegaChips), and a global design footprint (new Fort Collins design center). Its goal is to enable customers to build sophisticated, power-efficient, mixed-signal SoCs quickly by providing ready-to-license IP plus engineering services that fit their specific needs.

Company size
51-200
Company stage
Series A
Total funding
$35M
Headquarters
Milpitas, CA
Founded
2015

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