Machine Learning Intern - Variable Circuit, Place-and-Route, and Layout Representations

Overview

Keysight is at the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~16,800 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do.

Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers.

Keysight is seeking a PhD intern to explore machine learning representations for variable electronic designs where the underlying structure can change across design points. The work extends beyond circuit topology to include physical layout, place-and-route structure, geometric relationships, connectivity, and design metadata used in modern electronic design workflows.

In this role, you will help develop and evaluate graph-based and structured representations that can support learning across designs with different blocks, devices, nets, placements, routes, and layout features. The goal is to make machine learning workflows more adaptable when moving from fixed-topology examples to richer design spaces that include circuit, layout, and routing variation.

You will collaborate with machine learning researchers, design automation engineers, and simulation experts to prototype representations, connect them to model training workflows, and study how representation choices affect generalization, optimization behavior, and design consistency.

Learning Outcomes

• Gain practical experience with graph representation learning for variable engineering design structures.
• Learn how circuit, layout, and place-and-route data can be converted into model-ready graph or tensor representations.
• Evaluate representation choices separately from model architecture limitations and training effects.
• Build intuition for transfer and generalization across design structures with changing connectivity, geometry, and constraints.
• Contribute to prototype workflows that connect Python-based experimentation with production-oriented C++ and LibTorch environments.

Responsibilities

• Design and prototype graph-based and structured data encodings for variable electronic designs spanning circuit topology, physical layout, and place-and-route information.
• Represent design attributes such as component or block identity, type, parameters, connectivity, placement, routing, geometry, hierarchy, and relevant constraints.
• Analyze existing fixed-structure assumptions in data pipelines and identify where they limit generalization to new circuits, layouts, or routing patterns.
• Develop mapping and validation utilities between source design data, such as netlists, layout representations, placement/routing metadata, and model-ready inputs.
• Integrate representation prototypes with graph learning, surrogate modeling, and design optimization workflows.
• Compare flexible graph representations against fixed-topology or fixed-grid baselines using clear evaluation criteria.
• Investigate failure modes related to inconsistent connectivity, missing physical context, layout abstraction, routing ambiguity, or representation/model mismatch.
• Document interfaces, assumptions, and experimental results so prototypes can be reviewed and extended by engineering teams.
• Validate selected workflows in Python and, where appropriate, C++/LibTorch environments.

Qualifications

Required Qualifications

• Currently pursuing or recently completed a PhD in electrical engineering, computer engineering, computer science, applied mathematics, machine learning, computational science, or a related technical field.
• Experience with machine learning, deep learning, graph neural networks, representation learning, or related methods for structured data.
• Strong programming skills in Python and/or C++, with interest in building research prototypes that can connect to production-oriented software environments.
• Familiarity with at least one electronic design domain, such as circuit netlists, EDA workflows, physical layout, place-and-route, design optimization, or simulation-driven design.
• Ability to reason about data structures, interfaces, validation, and experiment design in complex engineering workflows.
• Strong written and verbal communication skills and the ability to work collaboratively across research and engineering teams.

Preferred Qualifications

• Experience with PyTorch, LibTorch, graph learning frameworks, scientific computing, or numerical optimization.
• Background in EDA, CAD, layout algorithms, placement and routing, RF/microwave design, analog/RF circuits, or electromagnetic simulation.
• Experience designing experiments that compare alternative representations, baselines, and model architectures.
• Interest in applying AI/ML to electronic design automation, inverse design, surrogate modeling, or optimization workflows.