Principal Field Applications Engineer

Rambus has launched its CryptoManager Root of Trust supporting the Caliptra specification, a security solution for data centre and AI system-on-chips. The product works with the open-source Caliptra framework, which provides a common foundation for device identity and attestation across CPUs, GPUs, AI accelerators and other infrastructure components. The solution offers side-channel and fault-injection protections and includes hardware and software integration tools, such as dedicated drivers, APIs and system-level security applications. Rambus said the product helps semiconductor designers accelerate deployments whilst adding protection and flexibility. Caliptra is an open-source silicon Root of Trust developed within the CHIPS Alliance for data centre-class SoCs. It aims to provide consistency across devices from different suppliers.

Rambus enhances enterprise-grade Security for data center and AI SoCs with CryptoManager Root of Trust supporting the Caliptra specification. Rambus Inc. announced its CryptoManager Root of Trust supporting the Caliptra specification, a production-ready Root of Trust and security orchestration solution designed to deliver enterprise-grade security for mission-critical data center and AI SoCs. Interoperable with the open Caliptra framework, the Rambus solution helps semiconductor designers accelerate deployments with added protection, flexibility and support. CryptoManager Root of Trust delivers platform-wide security awareness with proven side-channel and fault-injection protections and best-in-class cryptographic agility for a low-risk path to volume implementations of highly secure data center and AI infrastructure devices. Caliptra is an open-source silicon Root of Trust designed for integration into data center-class SoCs. Initiated through the Open Compute Project and now developed within the CHIPS Alliance, it combines hardware, firmware and specifications to provide a common foundation for device identity, measured boot and attestation across CPUs, GPUs, AI accelerators, DPUs, networking devices and other infrastructure components. Its transparent, collaborative model supports greater consistency across devices from different suppliers. Production-Ready Security for Customer Caliptra Deployments With the CryptoManager Root of Trust supporting the Caliptra specification, designers can build on the open-source foundation to implement a complete production security subsystem. This addresses integration into the wider platform, provides the software and security orchestration needed for deployment, adds protection against advanced attacks, supports evolving cryptographic requirements, enables additional security certifications and maintains the solution throughout the device lifecycle. "As the Caliptra ecosystem gains momentum, organizations need a practical path to deploy scalable and supportable security solutions in demanding production environments," said Simon Blake-Wilson, SVP and general manager of Silicon IP at Rambus. "CryptoManager Root of Trust supporting the Caliptra specification provides the hardware, software, advanced protections and commercial support needed to accelerate deployment of differentiated, enterprise-grade security that is interoperable with the Caliptra framework." The CryptoManager Root of Trust supporting the Caliptra specification provides dedicated hardware-level security in an SoC, combining a secure RISC-V processor, protected memory, secure key and data storage, cryptographic accelerators, and secure interfaces. Operating alongside an unmodified open-source Caliptra Project core, it mediates interactions between the Caliptra Project core, the host processor and other SoC components so that security-sensitive operations can remain within a protected boundary while trust is extended across the wider platform. Through specialized drivers and security applications, CryptoManager Root of Trust provides platform-level awareness enabling security monitoring, policy enforcement, secure lifecycle management, and coordinated protection of critical system resources. The CryptoManager architecture supports classical, post-quantum, and regional cryptographic algorithms, along with advanced protections against side-channel and fault injection attacks, and certification support for security standards such as FIPS 140-3 and SESIP. By combining enterprise-grade security with simplified integration and certification readiness, the CryptoManager Root of Trust delivers a production-ready security platform for next-generation data center and AI semiconductor devices. David Marshall is the founder of VMblog.com, one of the industry's longest-running independent publications covering modern data center technologies. What began as a focus on virtualization and cloud computing has expanded to cover the full spectrum of enterprise IT, including AI, security, and DevOps, making VMblog a trusted destination for vendor news, technology analysis, and industry commentary.Beyond publishing, David has spent his career at the intersection of technology and business, inventing, marketing, and launching a number of successful software companies and products, and building a reputation as a skilled marketing executive in the enterprise IT space.David is also a published author, having written two well-regarded books on virtualization and served as technical editor for two "For Dummies" titles covering virtualization and cloud computing. He co-founded CloudCow.com, a publication focused on cloud computing, and has been named a VMware vExpert every year since 2009, one of the longest continuous honoree streaks in the program's history.Connect with David on LinkedIn: https://www.linkedin.com/in/davidmarshall/

TSMC OIP Ecosystem Forum North America. Event details. Rambus is excited to be participating at TSMC OIP Ecosystem Forum North America! Stop by booth #407 to chat with its experts about its solutions. Nidish Kamath, Director of Product Management, will also be presenting on LPDDR Memory. See session information below: Title: LPDDR Memory: Enabling Power-Efficient Performance in AI, Automotive and Data Center Systems Speaker: Nidish Kamath Time: 4:10pm- 4:30pm Abstract: The rapid growth of AI, edge computing, and mobile-class compute in data center, automotive, and client platforms is fundamentally changing memory subsystem requirements. While performance demands continue to increase - driven by AI inference, real-time analytics, and always-on workloads - power efficiency and form-factor constraints are becoming equally critical. Traditional high-performance memory solutions often struggle to meet aggressive power budgets, while mobile-oriented memory technologies must now scale to support higher bandwidths and more complex system architectures. LPDDR has emerged as a key enabler for these new compute paradigms, extending beyond smartphones into AI accelerators, automotive SoCs, and power-constrained data center applications. However, adopting LPDDR at scale introduces several challenges, including higher interface speeds, tighter signal integrity margins, increased controller and PHY complexity, and the need for robust power management and reliability features. Additionally, advanced process nodes exacerbate variability and noise sensitivity, requiring closer co-optimization between memory IP, silicon technology, and system design. As LPDDR continues to evolve with higher data rates, lower operating voltages, and new architectural features, designers need proven, scalable solutions that balance performance, power, and reliability while enabling faster time-to-market.