Design Verification Engineer Intern

About GlobalFoundries

GlobalFoundries (GF) is a leading manufacturer of essential semiconductors, enabling AI at scale from the cloud to the physical world. Through deep partnerships with customers, GF delivers differentiated, power‑efficient and high‑performance solutions for high‑growth markets. GF is a trusted and holistic technology partner for customers around the world. GF’s talented, global team remains focused every day on security, longevity and sustainability. For more information, visit www.gf.com.

Internship Program Overview: 

Our Interns & Co-ops are our entry-level talent pipeline for GF across the globe. Our goal is to provide students with a meaningful work experience that will equip them with the skills to embark on a career in the fast-paced and growing semiconductor industry after graduation. As an intern at GF, you’ll experience one-on-one mentorship, work assignments that prioritize your growth and potential, professional development opportunities, and the chance to network with executives.

Summary of Role:

MIPS – A GlobalFoundries company is seeking a Design Verification Engineer Intern to join the CPU verification team in Plano, Texas. The intern will gain hands-on experience verifying processor components, with a focus on CPU core functionality, performance, and modeling, while learning advanced verification methodologies and collaborating with experienced architects and designers.

Essential Responsibilities include:

• Perform functional verification of CPU cores and related subsystems.

• Interpret microarchitectural specifications and contribute to effective verification strategies.

• Develop and execute verification plans, including testbench creation and test case development.

• Write directed and constrained-random test cases in SystemVerilog, C, and Assembly.

• Use UVM-based environments for coverage-driven verification.

• Analyze coverage reports and support closure of functional and code coverage gaps.

• Automate regression and verification flows using Python, Perl, or Shell.

• Collaborate with engineers and architects to support design quality and performance.

Other Responsibilities:

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications:

• Education – At least a sophomore at time of application and actively pursuing a Bachelor’s in Electronics Engineering, Electrical Engineering, Computer Engineering, Computer Science, or related field through an accredited degree program during the time of internship.

• Must have at least an overall 3.0 GPA and be in good academic standing.

• Language Fluency - English (Written & Verbal)

• Ability to work at least 40 hours per week during the internship.

• Coursework or project experience with SystemVerilog, UVM, or constrained-random verification.

• Familiarity with CPU architectures such as RISC-V, ARM, or MIPS.

• Basic understanding of cache and coherency concepts.

• Scripting experience in Python, Perl, or Shell.

• Strong analytical, problem-solving, and technical communication skills.

• Self-motivated and collaborative, with the ability to contribute to project goals.

Preferred Qualifications: 

• Prior related internship or co-op experience

• Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.

• Strong interest in leveraging AI tools and emerging technologies to enhance productivity, streamline workflows, and support effective decision-making.

• Project management skills, i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity. 

• Strong written and verbal communication skills 

• Strong planning & organizational skills

• Exposure to RISC-V architecture.

• Knowledge of interconnect protocols such as AXI, ACE, or CHI.

• Experience with FPGA prototyping or emulation platforms.

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Expected Salary Range

$20.00 - $40.00

Expected Salary Range

$0.00 - $0.00

The exact Salary will be determined based on qualifications, experience and location.