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Positron

Memory-first AI inference silicon for LLMs

Principal ASIC Architect - AI Inference

Silicon & ASIC DesignUpdated on Nov 12
Full-time

About the Job

Requirements

  • At least 15 years of experience in ASIC architecture.
  • Deep expertise in AI accelerator design and high-performance systems-on-chip.
  • Hands-on experience building performance models for memory systems and interconnects.
  • Strong hardware/software co-design ability.
  • Excellent written and verbal communication skills.

Responsibilities

  • Own architectural exploration across transformer models, mixture-of-experts models, sparse models, and long-context inference.
  • Evaluate speculative decoding, continuous batching, key-value cache evolution, sub-quadratic and linear attention, and state-space models.
  • Assess memory architectures, communication architectures, and interconnects for next-generation accelerators.
  • Develop analytical models and build simulation frameworks to evaluate architectural tradeoffs.
  • Estimate latency, throughput, bandwidth, memory and compute utilization, scaling efficiency, power, area, and cost.
  • Partner with compiler, runtime, system software, firmware, ASIC engineering, and machine learning research teams to align hardware direction with workload needs.
  • Develop architecture documents and define subsystem interfaces.
  • Evaluate tradeoffs across competing architectural directions and guide the future product roadmap.
  • Track new large language models, reasoning models, research papers, hardware competitors, academic research, and emerging algorithms.
  • Use artificial intelligence to accelerate research, performance analysis, architecture exploration, simulation generation, and documentation.
  • Help define future architectures and create a scalable architectural direction bridging software and hardware.

Desired Qualifications

  • Experience with GPU architecture.
  • A solid grasp of machine learning systems, distributed inference, and large-scale serving.
  • Deep knowledge of transformer internals.
  • Compiler experience.
  • A track record of research publications.

About the Company

Positron

Memory-first AI inference silicon for LLMs

Positron develops memory-first AI inference silicon and systems to scale large-language-model serving. Its Atlas systems rely on commodity LPDDR5X memory rather than expensive HBM/CoWoS to boost bandwidth and capacity, enabling more efficient LLM deployment at hyperscale. The company’s next-generation Asimov silicon (tape-out planned for late 2026; production in 2027) pairs compute with very large memory per chip (roughly 288 GB to 2,304 GB) and is designed to be combined into Titan configurations (four to eight Asimov chips) for extremely large models and long context windows. Positron has already deployed Atlas systems in the cloud, including 50+ racks at Oracle Cloud Infrastructure and partnerships with Parasail, Jump Trading, and i3d.net. Its goal is to provide scalable, memory-rich AI inference hardware that lowers cost and increases throughput for serving large language models.

Company size
51-200
Company stage
Series C
Total funding
$1.2B
Headquarters
Reno, NV
Founded
2023

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