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SiFive

Designs and sells RISC-V semiconductor cores

Design Verification Engineer to Staff Engineer - Unit Level Test

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeHsinchu, Hsinchu City, TaiwanIn-person

About the Job

Requirements

  • At least 3 years of recent experience with standard verification tools and methodologies, including SystemVerilog/UVM, Verdi/DVE, Verilog, Makefiles, and scripting languages.
  • Have familiarity with the AMBA protocol.
  • Have a solid understanding of processor and system-on-chip architecture, or a strong desire and ability to learn it.
  • Have a thorough understanding of the high-level verification flow methodology, including test plan generation, test generation, failure analysis, coverage analysis, and closure.
  • Be proficient in troubleshooting and possess analytical capabilities.
  • Have interpersonal skills to listen to diverse points of view and influence people from different disciplines.

Responsibilities

  • Work with CPU designers, compiler, performance, and system verification teams to automatically generate test cases that meet verification requirements from different perspectives.
  • Establish a highly scalable and reusable constrained-random test bench that produces coverage-driven tests.
  • Review and influence product definitions and specifications from a verification perspective, and collaborate with the design team on feature specifications, test plans, and failure analysis.
  • Develop checkers and assertions to verify memory subsystem designs with interconnect.
  • Develop tools, test benches, and test suites, using UVM, C++/C, or other approaches as needed, to execute test plans.
  • Develop and maintain in-house Verification IP tailored for memory subsystem and interconnect testing.
  • Write functional coverage, analyze code and functional coverage, and close coverage holes.

Desired Qualifications

  • Familiarity with the AMBA protocol.

About the Company

SiFive

Designs and sells RISC-V semiconductor cores

SiFive designs and sells RISC-V based processors and related IP for use in devices and systems. Its chips come as cores and system-on-chip designs built on the open RISC-V instruction set, enabling customers to integrate high-density, energy-efficient compute into products. Unlike competitors that rely on closed architectures, SiFive leverages openness to offer flexible, scalable, and cost-effective solutions that boost compute density. The company aims to grow the RISC-V ecosystem by delivering high-performance hardware that helps customers tackle data-heavy tasks and build smarter devices.

Company size
501-1,000
Company stage
Series G
Total funding
$772.5M
Headquarters
Santa Clara, CA
Founded
2015

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