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Eridu AI

AI-native networking chips for large clusters

Network Switch SDK - Software Developer

Embedded EngineeringUpdated on Nov 13
Full-timeBengaluru, Karnataka, IndiaNo salary listedIn-person

About the Job

Requirements

  • A Bachelor's degree in Computer Science or ECE, or a Master's degree in Computer Science or ECE, is required.
  • Five to ten years of experience is required.
  • Expertise in Layer 2 and Layer 3 Ethernet switching and routing protocols is required.
  • Coding expertise in C, C++, or Python is required.
  • Experience developing embedded system software for switches or routers is required.
  • Experience developing SDKs for Ethernet switch silicon is required.
  • Experience in Layer 2 switching and forwarding areas such as link aggregation groups, virtual LANs, xSTP, LLDP, and data center fabric switching is required.
  • Experience with Layer 3 unicast or multicast routing protocols such as RIP, OSPF, IGMP, BGP, and IS-IS is required.
  • Experience with access control lists, quality of service, policers, and TCAM is required.
  • Ten or more years of hands-on experience building firmware and software abstractions for networking ASICs, SoCs, and embedded platforms is required.
  • A strong command of C and C++ in Linux-based environments is required.
  • Familiarity with compiler toolchains and tools for profiling network latency and system performance is required.
  • Experience with modern network operating systems such as SONiC is required.
  • Familiarity with simulation environments and behavioral models such as BMv2 and proprietary RTL-based ASIC simulations is required.

Responsibilities

  • Design and develop the software development kit, which serves as the abstraction layer between hardware and software ecosystems.
  • Work across silicon, system, and network operating system teams to ensure high-performance switch ASICs are performant and production-ready.

About the Company

Eridu AI

AI-native networking chips for large clusters

Eridu AI designs AI-native networking chips and systems that replace multi-hop optical tiers in large GPU training clusters. Their products place more networking functions on-chip within a redesigned switch stack, which reduces power consumption, cost, and latency as GPU bandwidth scales. This approach differs from traditional Arista-like gear by integrating switching functionality directly into silicon, aiming for highly scalable, energy-efficient networking for hyperscale cloud providers, AI labs, and enterprises running million-GPU-class clusters. The company targets large-scale GPU deployments and seeks to make data-center networking more efficient, scalable, and cost-effective, backed by substantial funding from major investors to support growth and deployment.

Company size
51-200
Company stage
Series A
Total funding
$230M
Headquarters
Saratoga, CA
Founded
2024

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